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This patch removes RAS_FFH_SUPPORT macro which is the combination of ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an internal macro FFH_SUPPORT which gets enabled when platforms wants to enable lower EL EA handling at EL3. The internal macro FFH_SUPPORT will be automatically enabled if HANDLE_EA_EL3_FIRST_NS is enabled. FFH_SUPPORT along with ENABLE_FEAT_RAS will be used in source files to provide equivalent check which was provided by RAS_FFH_SUPPORT earlier. In generic code we needed a macro which could abstract both HANDLE_EA_EL3_FIRST_NS and RAS_FFH_SUPPORT macros that had limitations. Former was tied up with NS world only while the latter was tied to RAS feature. This is to allow Secure/Realm world to have their own FFH macros in future. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ie5692ccbf462f5dcc3f005a5beea5aa35124ac73
82 lines
1.9 KiB
Makefile
82 lines
1.9 KiB
Makefile
#
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# Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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CSS_USE_SCMI_SDS_DRIVER := 1
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CSS_ENT_BASE := plat/arm/css/sgi
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ENABLE_FEAT_RAS := 1
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SDEI_SUPPORT := 0
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EL3_EXCEPTION_HANDLING := 0
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HANDLE_EA_EL3_FIRST_NS := 0
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CSS_SGI_CHIP_COUNT := 1
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CSS_SGI_PLATFORM_VARIANT := 0
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# Do not enable SVE
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ENABLE_SVE_FOR_NS := 0
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CTX_INCLUDE_FPREGS := 1
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INTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c
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PLAT_INCLUDES += -I${CSS_ENT_BASE}/include
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# GIC-600 configuration
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GICV3_SUPPORT_GIC600 := 1
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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ENT_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c
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PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/aarch64/sgi_helper.S
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BL1_SOURCES += ${INTERCONNECT_SOURCES} \
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drivers/arm/sbsa/sbsa.c
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BL2_SOURCES += ${CSS_ENT_BASE}/sgi_image_load.c \
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drivers/arm/css/sds/sds.c
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BL31_SOURCES += ${INTERCONNECT_SOURCES} \
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${ENT_GIC_SOURCES} \
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${CSS_ENT_BASE}/sgi_bl31_setup.c \
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${CSS_ENT_BASE}/sgi_topology.c
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ifneq (${RESET_TO_BL31},0)
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$(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
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Please set RESET_TO_BL31 to 0.")
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endif
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$(eval $(call add_define,SGI_PLAT))
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$(eval $(call add_define,CSS_SGI_CHIP_COUNT))
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$(eval $(call add_define,CSS_SGI_PLATFORM_VARIANT))
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override CSS_LOAD_SCP_IMAGES := 0
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override NEED_BL2U := no
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override ARM_PLAT_MT := 1
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override PSCI_EXTENDED_STATE_ID := 1
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override ARM_RECOM_STATE_ID_ENC := 1
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# System coherency is managed in hardware
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HW_ASSISTED_COHERENCY := 1
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# When building for systems with hardware-assisted coherency, there's no need to
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# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
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USE_COHERENT_MEM := 0
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include plat/arm/common/arm_common.mk
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include plat/arm/css/common/css_common.mk
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include plat/arm/soc/common/soc_css.mk
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include plat/arm/board/common/board_common.mk
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