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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
130 lines
3.3 KiB
C
130 lines
3.3 KiB
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <lib/psci/psci.h>
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#include "uniphier.h"
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#define UNIPHIER_ROM_RSV0 0x59801200
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#define UNIPHIER_SLFRSTSEL 0x61843010
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#define UNIPHIER_SLFRSTSEL_MASK (0x3 << 0)
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#define UNIPHIER_SLFRSTCTL 0x61843014
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#define UNIPHIER_SLFRSTCTL_RST (1 << 0)
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#define MPIDR_AFFINITY_INVALID ((u_register_t)-1)
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uintptr_t uniphier_sec_entrypoint;
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void uniphier_warmboot_entrypoint(void);
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void __dead2 uniphier_fake_pwr_down(void);
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u_register_t uniphier_holding_pen_release;
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static int uniphier_psci_scp_mode;
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static int uniphier_psci_pwr_domain_on(u_register_t mpidr)
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{
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uniphier_holding_pen_release = mpidr;
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flush_dcache_range((uint64_t)&uniphier_holding_pen_release,
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sizeof(uniphier_holding_pen_release));
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mmio_write_64(UNIPHIER_ROM_RSV0,
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(uint64_t)&uniphier_warmboot_entrypoint);
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sev();
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return PSCI_E_SUCCESS;
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}
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static void uniphier_psci_pwr_domain_off(const psci_power_state_t *target_state)
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{
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uniphier_gic_cpuif_disable();
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}
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static void uniphier_psci_pwr_domain_on_finish(
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const psci_power_state_t *target_state)
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{
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uniphier_gic_pcpu_init();
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uniphier_gic_cpuif_enable();
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uniphier_cci_enable();
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}
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static void __dead2 uniphier_psci_pwr_domain_pwr_down_wfi(
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const psci_power_state_t *target_state)
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{
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/*
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* The Boot ROM cannot distinguish warn and cold resets.
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* Instead of the CPU reset, fake it.
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*/
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uniphier_holding_pen_release = MPIDR_AFFINITY_INVALID;
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flush_dcache_range((uint64_t)&uniphier_holding_pen_release,
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sizeof(uniphier_holding_pen_release));
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uniphier_fake_pwr_down();
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}
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static void uniphier_self_system_reset(void)
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{
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mmio_clrbits_32(UNIPHIER_SLFRSTSEL, UNIPHIER_SLFRSTSEL_MASK);
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mmio_setbits_32(UNIPHIER_SLFRSTCTL, UNIPHIER_SLFRSTCTL_RST);
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}
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static void __dead2 uniphier_psci_system_off(void)
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{
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if (uniphier_psci_scp_mode) {
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uniphier_scp_system_off();
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} else {
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NOTICE("SCP is disabled; can't shutdown the system.\n");
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NOTICE("Resetting the system instead.\n");
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uniphier_self_system_reset();
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}
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wfi();
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ERROR("UniPhier System Off: operation not handled.\n");
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panic();
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}
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static void __dead2 uniphier_psci_system_reset(void)
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{
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if (uniphier_psci_scp_mode)
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uniphier_scp_system_reset();
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else
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uniphier_self_system_reset();
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wfi();
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ERROR("UniPhier System Reset: operation not handled.\n");
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panic();
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}
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static const struct plat_psci_ops uniphier_psci_ops = {
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.pwr_domain_on = uniphier_psci_pwr_domain_on,
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.pwr_domain_off = uniphier_psci_pwr_domain_off,
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.pwr_domain_on_finish = uniphier_psci_pwr_domain_on_finish,
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.pwr_domain_pwr_down_wfi = uniphier_psci_pwr_domain_pwr_down_wfi,
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.system_off = uniphier_psci_system_off,
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.system_reset = uniphier_psci_system_reset,
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};
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int plat_setup_psci_ops(uintptr_t sec_entrypoint,
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const struct plat_psci_ops **psci_ops)
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{
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uniphier_sec_entrypoint = sec_entrypoint;
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flush_dcache_range((uint64_t)&uniphier_sec_entrypoint,
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sizeof(uniphier_sec_entrypoint));
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uniphier_psci_scp_mode = uniphier_scp_is_running();
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flush_dcache_range((uint64_t)&uniphier_psci_scp_mode,
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sizeof(uniphier_psci_scp_mode));
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if (uniphier_psci_scp_mode)
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uniphier_scp_open_com();
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*psci_ops = &uniphier_psci_ops;
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return 0;
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}
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