Andre Przywara f5360cfa81 refactor(trbe): enable FEAT_TRBE for FEAT_STATE_CHECKED ... At the moment we only support FEAT_TRBE to be either unconditionally compiled in, or to be not supported at all. Add support for runtime detection (ENABLE_TRBE_FOR_NS=2), by splitting is_feat_trbe_present() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we access TRBE related registers. The FVP platform decided to compile in support unconditionally (=1), even though FEAT_TRBE is an ARMv9 feature, so is not available with the FVP model's default command line. Change that to the now supported dynamic option (=2), so the right decision can be made by the code at runtime. Change-Id: Iee7f88ea930119049543a8a4a105389997e7692c Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2023-02-27 18:04:14 +00:00
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amu	fix(amu): limit virtual offset register access to NS world	2022-04-28 20:30:42 +02:00
brbe	feat(brbe): add brbe under feature detection mechanism	2022-06-06 11:43:03 +01:00
mpam	refactor(mpam): remove initialization of EL2 registers when EL2 is used	2022-04-12 17:41:51 +02:00
mtpmu	Add support for FEAT_MTPMU for Armv8.6	2020-12-11 12:49:20 +00:00
pauth	TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U	2019-10-03 14:43:55 +01:00
ras	lib/extensions/ras: fix bug of binary search	2021-01-14 09:27:16 +08:00
sme	fix(sme): add missing ISBs	2022-10-13 13:51:05 +01:00
spe	feat(spe): add support for FEAT_SPEv1p2	2022-02-10 09:30:13 +00:00
sve	feat(sve): support full SVE vector length	2022-07-08 17:17:11 +01:00
sys_reg_trace	feat(sys_reg_trace): enable trace system registers access from lower NS ELs	2021-08-26 09:29:51 +01:00
trbe	refactor(trbe): enable FEAT_TRBE for FEAT_STATE_CHECKED	2023-02-27 18:04:14 +00:00
trf	feat(trf): enable trace filter control register access from lower NS EL	2021-08-26 09:32:35 +01:00