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refactor(trbe): enable FEAT_TRBE for FEAT_STATE_CHECKED
At the moment we only support FEAT_TRBE to be either unconditionally compiled in, or to be not supported at all. Add support for runtime detection (ENABLE_TRBE_FOR_NS=2), by splitting is_feat_trbe_present() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we access TRBE related registers. The FVP platform decided to compile in support unconditionally (=1), even though FEAT_TRBE is an ARMv9 feature, so is not available with the FVP model's default command line. Change that to the now supported dynamic option (=2), so the right decision can be made by the code at runtime. Change-Id: Iee7f88ea930119049543a8a4a105389997e7692c Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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de8c489247
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6 changed files with 32 additions and 31 deletions
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@ -112,7 +112,7 @@ ifeq (${ENABLE_MPAM_FOR_LOWER_ELS},1)
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BL31_SOURCES += lib/extensions/mpam/mpam.c
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endif
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ifeq (${ENABLE_TRBE_FOR_NS},1)
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ifneq (${ENABLE_TRBE_FOR_NS},0)
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BL31_SOURCES += lib/extensions/trbe/trbe.c
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endif
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@ -258,16 +258,6 @@ static void read_feat_brbe(void)
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#endif
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}
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/******************************************************
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* Feature : FEAT_TRBE (Trace Buffer Extension)
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*****************************************************/
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static void read_feat_trbe(void)
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{
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#if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS)
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feat_detect_panic(is_feat_trbe_present(), "TRBE");
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#endif
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}
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/******************************************************************
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* Feature : FEAT_RNG_TRAP (Trapping support for RNDR/RNDRRS)
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*****************************************************************/
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@ -345,7 +335,8 @@ void detect_arch_features(void)
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/* v9.0 features */
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read_feat_brbe();
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read_feat_trbe();
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check_feature(ENABLE_TRBE_FOR_NS, read_feat_trbe_id_field(),
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"TRBE", 1, 1);
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/* v9.2 features */
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read_feat_rme();
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@ -297,10 +297,22 @@ static inline bool is_feat_brbe_present(void)
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/*******************************************************************************
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* Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
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******************************************************************************/
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static inline bool is_feat_trbe_present(void)
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static inline unsigned int read_feat_trbe_id_field(void)
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{
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return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEBUFFER_SHIFT) &
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ID_AA64DFR0_TRACEBUFFER_MASK) == ID_AA64DFR0_TRACEBUFFER_SUPPORTED);
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return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
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}
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static inline bool is_feat_trbe_supported(void)
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{
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if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_trbe_id_field() != 0U;
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}
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#endif /* ARCH_FEATURES_H */
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@ -495,9 +495,9 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx)
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mpam_enable(el2_unused);
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#endif
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#if ENABLE_TRBE_FOR_NS
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trbe_enable();
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#endif /* ENABLE_TRBE_FOR_NS */
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if (is_feat_trbe_supported()) {
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trbe_enable();
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}
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#if ENABLE_BRBE_FOR_NS
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brbe_enable();
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@ -23,22 +23,20 @@ void trbe_enable(void)
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{
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uint64_t val;
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if (is_feat_trbe_present()) {
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/*
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* MDCR_EL3.NSTB = 0b11
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* Allow access of trace buffer control registers from NS-EL1
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* and NS-EL2, tracing is prohibited in Secure and Realm state
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* (if implemented).
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*/
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val = read_mdcr_el3();
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val |= MDCR_NSTB(MDCR_NSTB_EL1);
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write_mdcr_el3(val);
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}
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/*
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* MDCR_EL3.NSTB = 0b11
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* Allow access of trace buffer control registers from NS-EL1
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* and NS-EL2, tracing is prohibited in Secure and Realm state
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* (if implemented).
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*/
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val = read_mdcr_el3();
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val |= MDCR_NSTB(MDCR_NSTB_EL1);
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write_mdcr_el3(val);
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}
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static void *trbe_drain_trace_buffers_hook(const void *arg __unused)
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{
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if (is_feat_trbe_present()) {
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if (is_feat_trbe_supported()) {
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/*
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* Before switching from normal world to secure world
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* the trace buffers need to be drained out to memory. This is
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@ -446,7 +446,7 @@ DYN_DISABLE_AUTH := 1
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endif
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# enable trace buffer control registers access to NS by default
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ENABLE_TRBE_FOR_NS := 1
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ENABLE_TRBE_FOR_NS := 2
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# enable branch record buffer control registers access in NS by default
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# only enable for aarch64
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