nayanpatel-arm ef8f0c52dd fix(errata): workaround for Neoverse-N2 erratum 2138953 ... Neoverse-N2 erratum 2138953 is a Cat B erratum that applies to revision r0p0 of CPU. It is still open. The workaround is to write the value 4'b1001 to the PF_MODE bits in the IMP_CPUECTLR2_EL1 register which will place the data prefetcher in the most conservative mode instead of disabling it. SDEN can be found here: https://developer.arm.com/documentation/SDEN1982442/latest Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com> Change-Id: Ife0a4bece7ccf83cc99c1d5f5b5a43084bb69d64		2021-10-01 12:01:20 -07:00
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alt-boot-flows.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
auth-framework.rst	Cleanup the code for TBBR CoT descriptors	2020-05-19 05:05:19 +01:00
cpu-specific-build-macros.rst	fix(errata): workaround for Neoverse-N2 erratum 2138953	2021-10-01 12:01:20 -07:00
firmware-design.rst	doc: Correct CPACR.FPEN usage	2020-09-14 02:35:50 +00:00
index.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
interrupt-framework-design.rst	Fix broken links to various sections across docs	2020-08-03 09:55:04 -05:00
psci-pd-tree.rst	doc: Set correct syntax highlighting style	2019-05-22 11:28:17 +01:00
reset-design.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
trusted-board-boot-build.rst	Mention COT build option in trusted-board-boot-build.rst	2020-03-12 17:11:26 +01:00
trusted-board-boot.rst	Update cryptographic algorithms in TBBR doc	2020-03-12 17:11:25 +01:00