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fix(errata): workaround for Neoverse-N2 erratum 2138953
Neoverse-N2 erratum 2138953 is a Cat B erratum that applies to revision r0p0 of CPU. It is still open. The workaround is to write the value 4'b1001 to the PF_MODE bits in the IMP_CPUECTLR2_EL1 register which will place the data prefetcher in the most conservative mode instead of disabling it. SDEN can be found here: https://developer.arm.com/documentation/SDEN1982442/latest Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com> Change-Id: Ife0a4bece7ccf83cc99c1d5f5b5a43084bb69d64
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nayanpatel-arm
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4 changed files with 67 additions and 13 deletions
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@ -403,6 +403,9 @@ For Neoverse N2, the following errata build flags are defined :
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- ``ERRATA_N2_2138956``: This applies errata 2138956 workaround to Neoverse-N2
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CPU. This needs to be enabled for revision r0p0 of the CPU and is still open.
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- ``ERRATA_N2_2138953``: This applies errata 2138953 workaround to Neoverse-N2
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CPU. This needs to be enabled for revision r0p0 of the CPU and is still open.
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DSU Errata Workarounds
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----------------------
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@ -8,37 +8,45 @@
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#define NEOVERSE_N2_H
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/* Neoverse N2 ID register for revision r0p0 */
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#define NEOVERSE_N2_MIDR U(0x410FD490)
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#define NEOVERSE_N2_MIDR U(0x410FD490)
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/*******************************************************************************
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* CPU Power control register
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******************************************************************************/
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#define NEOVERSE_N2_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define NEOVERSE_N2_CORE_PWRDN_EN_BIT (ULL(1) << 0)
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#define NEOVERSE_N2_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define NEOVERSE_N2_CORE_PWRDN_EN_BIT (ULL(1) << 0)
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/*******************************************************************************
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* CPU Extended Control register specific definitions.
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******************************************************************************/
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#define NEOVERSE_N2_CPUECTLR_EL1 S3_0_C15_C1_4
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#define NEOVERSE_N2_CPUECTLR_EL1_EXTLLC_BIT (ULL(1) << 0)
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#define NEOVERSE_N2_CPUECTLR_EL1_PFSTIDIS_BIT (ULL(1) << 8)
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#define NEOVERSE_N2_CPUECTLR_EL1 S3_0_C15_C1_4
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#define NEOVERSE_N2_CPUECTLR_EL1_EXTLLC_BIT (ULL(1) << 0)
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#define NEOVERSE_N2_CPUECTLR_EL1_PFSTIDIS_BIT (ULL(1) << 8)
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions.
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******************************************************************************/
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#define NEOVERSE_N2_CPUACTLR_EL1 S3_0_C15_C1_0
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#define NEOVERSE_N2_CPUACTLR_EL1_BIT_46 (ULL(1) << 46)
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#define NEOVERSE_N2_CPUACTLR_EL1 S3_0_C15_C1_0
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#define NEOVERSE_N2_CPUACTLR_EL1_BIT_46 (ULL(1) << 46)
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/*******************************************************************************
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* CPU Auxiliary Control register 2 specific definitions.
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******************************************************************************/
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#define NEOVERSE_N2_CPUACTLR2_EL1 S3_0_C15_C1_1
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#define NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
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#define NEOVERSE_N2_CPUACTLR2_EL1 S3_0_C15_C1_1
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#define NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
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/*******************************************************************************
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* CPU Auxiliary Control register 5 specific definitions.
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******************************************************************************/
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#define NEOVERSE_N2_CPUACTLR5_EL1 S3_0_C15_C8_0
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#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 (ULL(1) << 44)
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#define NEOVERSE_N2_CPUACTLR5_EL1 S3_0_C15_C8_0
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#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 (ULL(1) << 44)
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions.
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******************************************************************************/
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#define NEOVERSE_N2_CPUECTLR2_EL1 S3_0_C15_C1_5
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#define NEOVERSE_N2_CPUECTLR2_EL1_PF_MODE_CNSRV ULL(9)
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#define CPUECTLR2_EL1_PF_MODE_LSB U(11)
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#define CPUECTLR2_EL1_PF_MODE_WIDTH U(4)
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#endif /* NEOVERSE_N2_H */
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@ -183,6 +183,35 @@ func check_errata_2138956
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b cpu_rev_var_ls
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endfunc check_errata_2138956
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N2 Erratum 2138953.
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* This applies to revision r0p0 of Neoverse N2. it is still open.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x1, x17
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* --------------------------------------------------
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*/
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func errata_n2_2138953_wa
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/* Check revision. */
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mov x17, x30
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bl check_errata_2138953
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cbz x0, 1f
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/* Apply instruction patching sequence */
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mrs x1, NEOVERSE_N2_CPUECTLR2_EL1
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mov x0, #NEOVERSE_N2_CPUECTLR2_EL1_PF_MODE_CNSRV
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bfi x1, x0, #CPUECTLR2_EL1_PF_MODE_LSB, #CPUECTLR2_EL1_PF_MODE_WIDTH
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msr NEOVERSE_N2_CPUECTLR2_EL1, x1
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1:
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ret x17
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endfunc errata_n2_2138953_wa
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func check_errata_2138953
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/* Applies to r0p0 */
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mov x1, #0x00
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b cpu_rev_var_ls
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endfunc check_errata_2138953
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/* -------------------------------------------
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* The CPU Ops reset function for Neoverse N2.
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* -------------------------------------------
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@ -224,6 +253,11 @@ func neoverse_n2_reset_func
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bl errata_n2_2138956_wa
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#endif
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#if ERRATA_N2_2138953
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mov x0, x18
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bl errata_n2_2138953_wa
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#endif
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#if ENABLE_AMU
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/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
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mrs x0, cptr_el3
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@ -287,8 +321,9 @@ func neoverse_n2_errata_report
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report_errata ERRATA_N2_2002655, neoverse_n2, 2002655
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report_errata ERRATA_N2_2067956, neoverse_n2, 2067956
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report_errata ERRATA_N2_2025414, neoverse_n2, 2025414
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report_errata ERRATA_N2_2189731, neoverse_n2, 2189731
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report_errata ERRATA_N2_2189731, neoverse_n2, 2189731
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report_errata ERRATA_N2_2138956, neoverse_n2, 2138956
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report_errata ERRATA_N2_2138953, neoverse_n2, 2138953
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ldp x8, x30, [sp], #16
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ret
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@ -441,6 +441,10 @@ ERRATA_N2_2189731 ?=0
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# to revision r0p0 of the Neoverse N2 cpu and is still open.
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ERRATA_N2_2138956 ?=0
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# Flag to apply erratum 2138953 workaround during reset. This erratum applies
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# to revision r0p0 of the Neoverse N2 cpu and is still open.
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ERRATA_N2_2138953 ?=0
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# Flag to apply erratum 2055002 workaround during reset. This erratum applies
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# to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open.
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ERRATA_A710_2055002 ?=0
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@ -822,6 +826,10 @@ $(eval $(call add_define,ERRATA_N2_2189731))
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$(eval $(call assert_boolean,ERRATA_N2_2138956))
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$(eval $(call add_define,ERRATA_N2_2138956))
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# Process ERRATA_N2_2138953 flag
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$(eval $(call assert_boolean,ERRATA_N2_2138953))
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$(eval $(call add_define,ERRATA_N2_2138953))
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# Process ERRATA_A710_2055002 flag
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$(eval $(call assert_boolean,ERRATA_A710_2055002))
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$(eval $(call add_define,ERRATA_A710_2055002))
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