Boyan Karatotev abf6666e26 perf(psci): get PMF timestamps with no cache flushes if possible ... Whenever we have HW_ASSISTED_COHERENCY, caches are enabled early and we let the cores do the cache maintenance on our behalf. This is true for the PSCI stat timestamp capture and used to be the case. However, a model bug required us to do the cache maintenance manually. That has been fixed so we can revert back. Change-Id: Id315a8fea500fb5e2433d3786b2be5a9084300a7 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>		2025-02-25 08:51:24 +00:00
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aarch32	refactor(bl32): flush before console switch state	2025-01-21 12:22:57 +01:00
aarch64	feat(bl): add plat handler for image loading	2024-06-13 11:30:29 +02:00
tbbr	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
plat_bl1_common.c	refactor(bl1): clean up bl2 layout calculation	2024-04-26 09:00:12 +00:00
plat_bl_common.c	feat(handoff): common API for TPM event log handoff	2025-01-06 07:20:37 -08:00
plat_gicv2.c	refactor(el3-runtime): plat_ic_has_interrupt_type returns bool	2023-09-25 17:09:15 -05:00
plat_gicv3.c	fix(gic600): workaround for Part 1 of GIC600 erratum 2384374	2024-03-06 14:16:35 -06:00
plat_log_common.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
plat_psci_common.c	perf(psci): get PMF timestamps with no cache flushes if possible	2025-02-25 08:51:24 +00:00
plat_spmd_manifest.c	feat(spmd): map SPMC manifest region as EL3_PAS	2023-02-07 11:26:38 +00:00
ubsan.c	Add UBSAN support and handlers	2019-09-11 14:15:54 +01:00