Boyan Karatotev ece8f7d734 refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only ... These bits (MDCR_EL3.{NSTB, NSTBE, TTRF, TPM}, CPTR_EL3.TTA) only affect EL2 (and lower) execution. Each feat_init_el3() is called long before any lower EL has had a chance to execute, so setting the bits at reset is redundant. Removing them from reset code also improves readability of the immutable EL3 state. Preserve the original intention for the TTA bit of "enabled for NS and disabled everywhere else" (inferred from commit messages d4582d3088 and 2031d6166a and the comment). This is because CPTR_EL3 will be contexted and so everyone will eventually get whatever NS has anyway. Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I3d24b45d3ea80882c8e450b2d9db9d5531facec1		2023-07-24 11:04:44 +01:00
..
amu	refactor(amu): separate the EL2 and EL3 enablement code	2023-07-04 14:57:46 +01:00
brbe	refactor(cpufeat): separate the EL2 and EL3 enablement code	2023-07-04 14:57:46 +01:00
mpam	refactor(cpufeat): separate the EL2 and EL3 enablement code	2023-07-04 14:57:46 +01:00
pauth	chore(pauth): remove redundant pauth_disable_el3() call	2023-04-28 08:09:14 +01:00
pmuv3	refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only	2023-07-24 11:04:44 +01:00
ras	lib/extensions/ras: fix bug of binary search	2021-01-14 09:27:16 +08:00
sme	refactor(cpufeat): separate the EL2 and EL3 enablement code	2023-07-04 14:57:46 +01:00
spe	fix(cm): set MDCR_EL3.{NSPBE, STE} explicitly	2023-07-24 11:04:38 +01:00
sve	refactor(cpufeat): separate the EL2 and EL3 enablement code	2023-07-04 14:57:46 +01:00
sys_reg_trace	refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only	2023-07-24 11:04:44 +01:00
trbe	refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only	2023-07-24 11:04:44 +01:00
trf	fix(cm): set MDCR_EL3.{NSPBE, STE} explicitly	2023-07-24 11:04:38 +01:00