arm-trusted-firmware/lib/cpus
Boyan Karatotev 45c7328c0b fix(cpus): avoid SME related loss of context on powerdown
Travis' and Gelas' TRMs tell us to disable SME (set PSTATE.{ZA, SM} to
0) when we're attempting to power down. What they don't tell us is that
if this isn't done, the powerdown request will be rejected. On the
CPU_OFF path that's not a problem - we can force SVCR to 0 and be
certain the core will power off.

On the suspend to powerdown path, however, we cannot do this. The TRM
also tells us that the sequence could also be aborted on eg. GIC
interrupts. If this were to happen when we have overwritten SVCR to 0,
upon a return to the caller they would experience a loss of context. We
know that at least Linux may call into PSCI with SVCR != 0. One option
is to save the entire SME context which would be quite expensive just to
work around. Another option is to downgrade the request to a normal
suspend when SME was left on. This option is better as this is expected
to happen rarely enough to ignore the wasted power and we don't want to
burden the generic (correct) path with needless context management.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I698fa8490ebf51461f6aa8bba84f9827c5c46ad4
2025-02-03 14:29:47 +00:00
..
aarch32 refactor(cpus): remove cpu specific errata funcs 2024-07-26 11:19:52 +01:00
aarch64 fix(cpus): avoid SME related loss of context on powerdown 2025-02-03 14:29:47 +00:00
cpu-ops.mk fix(security): enable WORKAROUND_CVE_2024_7881 build option 2025-01-30 16:45:35 -06:00
errata_common.c fix(cpus): modify the fix for Cortex-A75 erratum 764081 2024-10-03 10:07:47 -05:00
errata_report.c refactor(cpus): directly invoke errata reporter 2024-07-26 11:19:52 +01:00