Andre Przywara d23acc9e4f refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 ... So far we have the ENABLE_AMU build option to include AMU register handling code for enabling and context switch. There is also an ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system register handling. The latter needs some alignment with the new feature scheme, but it conceptually overlaps with the ENABLE_AMU option. Since there is no real need for two separate options, unify both into a new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at this point, a subsequent patch will make use of the new feature handling scheme. Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2023-03-27 19:36:00 +01:00
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aarch64	fix(smccc): check smc_fid [23:17] bits	2023-03-20 10:12:38 +00:00
bl31.ld.S	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
bl31.mk	refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1	2023-03-27 19:36:00 +01:00
bl31_context_mgmt.c	feat(rme): add context management changes for FEAT_RME	2021-10-05 18:41:35 +02:00
bl31_main.c	refactor(context-mgmt): move FEAT_HCX save/restore into C	2023-01-11 16:02:58 +00:00
bl31_traps.c	feat(fvp): emulate trapped RNDR	2022-12-21 12:59:36 +00:00
ehf.c	fix(bl31): allow use of EHF with S-EL2 SPMC	2022-08-30 08:29:25 -07:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00