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0ad5b318f7
DynamIQ based designs have upto 8 CPUs in each cluster. This patch fixes the device tree node which describes the topology of the CPU for DynamIQ FVP Model. Change-Id: I7146bc79029ce38314026d4853e5b6406863725c Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
41 lines
428 B
Text
41 lines
428 B
Text
/*
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* Copyright (c) 2019-2020, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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#include "fvp-base-gicv3-psci-dynamiq-common.dtsi"
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&CPU0 {
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reg = <0x0 0x0>;
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};
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&CPU1 {
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reg = <0x0 0x1>;
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};
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&CPU2 {
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reg = <0x0 0x100>;
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};
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&CPU3 {
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reg = <0x0 0x101>;
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};
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&CPU4 {
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reg = <0x0 0x200>;
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};
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&CPU5 {
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reg = <0x0 0x201>;
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};
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&CPU6 {
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reg = <0x0 0x300>;
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};
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&CPU7 {
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reg = <0x0 0x301>;
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};
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