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511e4a48cc
There exist inter-processor interrupts on Versal-Net that do not have corresponding message buffers. These bufferless IPI's on Versal NET SOC are added to static IPI Tables. In hardware description there exists two IPI's called 'IPI6' without buffers that have respective system interrupt values 95 and 101. For these append the string '_95' or '_101' to denote the difference for each. Change-Id: I22bf1a68cb0ed68913eb868f1c197856fc7d82d5 Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
133 lines
2.8 KiB
C
133 lines
2.8 KiB
C
/*
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* Copyright (c) 2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Versal NET IPI agent registers access management
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*/
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#include <lib/utils_def.h>
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#include <ipi.h>
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#include <plat_ipi.h>
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/* versal_net ipi configuration table */
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static const struct ipi_config versal_net_ipi_table[IPI_ID_MAX] = {
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/* A72 IPI */
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[IPI_ID_APU] = {
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.ipi_bit_mask = IPI0_TRIG_BIT,
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.ipi_reg_base = IPI0_REG_BASE,
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.secure_only = 0,
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},
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/* PMC IPI */
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[IPI_ID_PMC] = {
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.ipi_bit_mask = PMC_IPI_TRIG_BIT,
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.ipi_reg_base = IPI0_REG_BASE,
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.secure_only = IPI_SECURE_MASK,
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},
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/* RPU0 IPI */
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[IPI_ID_RPU0] = {
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.ipi_bit_mask = IPI1_TRIG_BIT,
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.ipi_reg_base = IPI1_REG_BASE,
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.secure_only = 0,
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},
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/* RPU1 IPI */
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[IPI_ID_RPU1] = {
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.ipi_bit_mask = IPI2_TRIG_BIT,
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.ipi_reg_base = IPI2_REG_BASE,
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.secure_only = 0,
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},
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/* IPI3 IPI */
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[IPI_ID_3] = {
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.ipi_bit_mask = IPI3_TRIG_BIT,
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.ipi_reg_base = IPI3_REG_BASE,
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.secure_only = 0,
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},
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/* IPI4 IPI */
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[IPI_ID_4] = {
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.ipi_bit_mask = IPI4_TRIG_BIT,
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.ipi_reg_base = IPI4_REG_BASE,
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.secure_only = 0,
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},
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/* IPI5 IPI */
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[IPI_ID_5] = {
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.ipi_bit_mask = IPI5_TRIG_BIT,
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.ipi_reg_base = IPI5_REG_BASE,
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.secure_only = 0,
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},
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/* PMC_NOBUF IPI */
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[IPI_ID_PMC_NOBUF] = {
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.ipi_bit_mask = PMC_NOBUF_TRIG_BIT,
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.ipi_reg_base = PMC_NOBUF_REG_BASE,
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.secure_only = IPI_SECURE_MASK,
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},
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/* IPI6 IPI */
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[IPI_ID_6_NOBUF_95] = {
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.ipi_bit_mask = IPI6_NOBUF_95_TRIG_BIT,
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.ipi_reg_base = IPI6_NOBUF_95_REG_BASE,
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.secure_only = 0,
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},
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/* IPI1 NO BUF IPI */
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[IPI_ID_1_NOBUF] = {
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.ipi_bit_mask = IPI1_NOBUF_TRIG_BIT,
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.ipi_reg_base = IPI1_NOBUF_REG_BASE,
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.secure_only = 0,
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},
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/* IPI2 NO BUF IPI */
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[IPI_ID_2_NOBUF] = {
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.ipi_bit_mask = IPI2_NOBUF_TRIG_BIT,
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.ipi_reg_base = IPI2_NOBUF_REG_BASE,
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.secure_only = 0,
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},
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/* IPI3 NO BUF IPI */
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[IPI_ID_3_NOBUF] = {
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.ipi_bit_mask = IPI3_NOBUF_TRIG_BIT,
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.ipi_reg_base = IPI3_NOBUF_REG_BASE,
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.secure_only = 0,
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},
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/* IPI4 NO BUF IPI */
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[IPI_ID_4_NOBUF] = {
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.ipi_bit_mask = IPI4_NOBUF_TRIG_BIT,
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.ipi_reg_base = IPI4_NOBUF_REG_BASE,
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.secure_only = 0,
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},
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/* IPI5 NO BUF IPI */
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[IPI_ID_5_NOBUF] = {
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.ipi_bit_mask = IPI5_NOBUF_TRIG_BIT,
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.ipi_reg_base = IPI5_NOBUF_REG_BASE,
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.secure_only = 0,
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},
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/* IPI6 NO BUF IPI */
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[IPI_ID_6_NOBUF_101] = {
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.ipi_bit_mask = IPI6_NOBUF_101_TRIG_BIT,
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.ipi_reg_base = IPI6_NOBUF_101_REG_BASE,
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.secure_only = 0,
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},
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};
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/* versal_net_ipi_config_table_init() - Initialize versal_net IPI configuration
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* data.
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* @ipi_config_table: IPI configuration table.
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* @ipi_total: Total number of IPI available.
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*
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*/
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void versal_net_ipi_config_table_init(void)
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{
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ipi_config_table_init(versal_net_ipi_table, ARRAY_SIZE(versal_net_ipi_table));
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}
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