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![]() Align our device memory regions to the next highest MMU table level (LV2). This allows the xlat_tables library code to use a single entry in the higher order table, vs having to create a new table for LV3 entries. This reduces our tables to just 4: 2 LV2 and 1 LV3 plus 1 spare in case alignment changes ever cause one to be split. This saves 24KB of our 128KB total TF-A SRAM (~18%!). While here, as USE_COHERENT_MEM does not change MAX_XLAT_TABLES but does change our total MAX_MMAP_REGIONS, move that check accordingly. Signed-off-by: Andrew Davis <afd@ti.com> Change-Id: I4cb8e3b2cc3d05c6c9a84d887dd6ec56bde7a786 |
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k3_console.h | ||
k3_gicv3.h | ||
plat_macros.S | ||
platform_def.h |