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When RME is enabled the RMM is placed at the bottom of the NS RAM, meaning that NS_DRAM0_BASE has to be located after that. This patch disscociates the base of the NS RAM as defined by QEMU by introducing a new define, PLAT_QEMU_DRAM0_BASE. An offset can be added to that new define when the software's view of the base memory need to differ from QEMU. No change in functionality. Change-Id: I887f9993d5a61896352cfff17e0d92e2c2b9030a Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
64 lines
1.6 KiB
Makefile
64 lines
1.6 KiB
Makefile
#
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# Copyright (c) 2019-2023, Linaro Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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PLAT_QEMU_PATH := plat/qemu/qemu_sbsa
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PLAT_QEMU_COMMON_PATH := plat/qemu/common
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CRASH_REPORTING := 1
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# Disable the PSCI platform compatibility layer
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ENABLE_PLAT_COMPAT := 0
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SEPARATE_CODE_AND_RODATA := 1
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ENABLE_STACK_PROTECTOR := 0
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ifeq (${SPM_MM},1)
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NEED_BL32 := yes
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EL3_EXCEPTION_HANDLING := 1
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endif
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include plat/qemu/common/common.mk
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# Enable new version of image loading on QEMU platforms
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LOAD_IMAGE_V2 := 1
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ifeq ($(NEED_BL32),yes)
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$(eval $(call add_define,QEMU_LOAD_BL32))
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endif
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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QEMU_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c
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BL31_SOURCES += ${PLAT_QEMU_PATH}/sbsa_gic.c \
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${PLAT_QEMU_PATH}/sbsa_platform.c \
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${PLAT_QEMU_PATH}/sbsa_pm.c \
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${PLAT_QEMU_PATH}/sbsa_sip_svc.c \
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${PLAT_QEMU_PATH}/sbsa_topology.c
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BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
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ifeq (${SPM_MM},1)
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BL31_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_spm.c
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endif
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# Use known base for UEFI if not given from command line
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# By default BL33 is at FLASH1 base
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PRELOADED_BL33_BASE ?= 0x10000000
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# Qemu SBSA plafrom only support SEC_SRAM
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BL32_RAM_LOCATION_ID = SEC_SRAM_ID
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$(eval $(call add_define,BL32_RAM_LOCATION_ID))
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# Don't have the Linux kernel as a BL33 image by default
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ARM_LINUX_KERNEL_AS_BL33 := 0
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$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
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$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
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ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DRAM0_BASE
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$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
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