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https://github.com/ARM-software/arm-trusted-firmware.git
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eb4d4185fa
Enable the MMU and add two entries to map the BL2 code and data regions. Additional mappings will be added dynamically, enhancing flexibility and modularity during the porting process. Change-Id: I107abf944dfdce9dcff47b08272a5001484de8a9 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
81 lines
2 KiB
Makefile
81 lines
2 KiB
Makefile
#
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# Copyright 2024 NXP
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include drivers/arm/gic/v3/gicv3.mk
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_DRIVERS_PATH := drivers/nxp
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PLAT_COMMON_PATH := plat/nxp/common
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PLAT_S32G274ARDB2 := plat/nxp/s32/s32g274ardb2
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CONSOLE := LINFLEX
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include ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk
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# Flag to apply S32 erratum ERR051700. This erratum applies to all S32
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# revisions.
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S32_ERRATA_LIST += ERRATA_S32_051700
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PLAT_INCLUDES = \
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-I${PLAT_S32G274ARDB2}/include
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PROGRAMMABLE_RESET_ADDRESS := 1
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COLD_BOOT_SINGLE_CPU := 0
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ENABLE_SVE_FOR_NS := 0
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RESET_TO_BL2 := 1
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INIT_UNUSED_NS_EL2 := 1
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ERRATA_A53_855873 := 1
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ERRATA_A53_836870 := 1
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ERRATA_A53_1530924 := 1
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ERRATA_SPECULATIVE_AT := 1
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ERRATA_S32_051700 := 1
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PLAT_XLAT_TABLES_DYNAMIC := 1
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$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
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# Selecting Drivers for SoC
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$(eval $(call SET_NXP_MAKE_FLAG,CONSOLE_NEEDED,BL_COMM))
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$(eval $(call SET_NXP_MAKE_FLAG,CLK_NEEDED,BL_COMM))
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include ${PLAT_DRIVERS_PATH}/drivers.mk
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BL_COMMON_SOURCES += \
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${PLAT_S32G274ARDB2}/plat_console.c \
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${PLAT_S32G274ARDB2}/plat_helpers.S \
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${PLAT_S32G274ARDB2}/s32cc_bl_common.c \
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${XLAT_TABLES_LIB_SRCS} \
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BL2_SOURCES += \
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${BL_COMMON_SOURCES} \
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${PLAT_S32G274ARDB2}/plat_bl2_el3_setup.c \
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${PLAT_S32G274ARDB2}/plat_bl2_image_desc.c \
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${PLAT_S32G274ARDB2}/plat_io_storage.c \
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${PLAT_S32G274ARDB2}/s32cc_ncore.c \
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common/desc_image_load.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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lib/cpus/aarch64/cortex_a53.S \
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BL31_SOURCES += \
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${GICV3_SOURCES} \
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${PLAT_S32G274ARDB2}/plat_bl31_setup.c \
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${PLAT_S32G274ARDB2}/s32g2_psci.c \
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${PLAT_S32G274ARDB2}/s32g2_soc.c \
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${XLAT_TABLES_LIB_SRCS} \
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lib/cpus/aarch64/cortex_a53.S \
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plat/common/plat_gicv3.c \
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plat/common/plat_psci_common.c \
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# process all errata flags
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$(eval $(call default_zeros, $(S32_ERRATA_LIST)))
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$(eval $(call add_defines, $(S32_ERRATA_LIST)))
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$(eval $(call assert_booleans, $(S32_ERRATA_LIST)))
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