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d0e400b3c6
Using mpu_peri as the clock source will caused the system timer vary. System timer shall get from a static clock source. L4 and L3 clock are both the same at the moment. There shall be a hardware update to differentiate the clock pll. To keep this as dormant function for now. Change-Id: I4d253e2f24a74cbec59bfcbf0e8547abbe3643a8 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
102 lines
3.8 KiB
C
102 lines
3.8 KiB
C
/*
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* Copyright (c) 2019-2023, Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __CLOCKMANAGER_H__
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#define __CLOCKMANAGER_H__
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#include "s10_system_manager.h"
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#include "socfpga_handoff.h"
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#define ALT_CLKMGR 0xffd10000
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#define ALT_CLKMGR_CTRL 0x0
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#define ALT_CLKMGR_STAT 0x4
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#define ALT_CLKMGR_INTRCLR 0x14
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#define ALT_CLKMGR_INTRCLR_MAINLOCKLOST_SET_MSK 0x00000004
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#define ALT_CLKMGR_INTRCLR_PERLOCKLOST_SET_MSK 0x00000008
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#define ALT_CLKMGR_CTRL_BOOTMODE_SET_MSK 0x00000001
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#define ALT_CLKMGR_STAT_BUSY_E_BUSY 0x1
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#define ALT_CLKMGR_STAT_BUSY(x) (((x) & 0x00000001) >> 0)
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#define ALT_CLKMGR_STAT_MAINPLLLOCKED(x) (((x) & 0x00000100) >> 8)
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#define ALT_CLKMGR_STAT_PERPLLLOCKED(x) (((x) & 0x00000200) >> 9)
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#define ALT_CLKMGR_MAINPLL 0xffd10030
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#define ALT_CLKMGR_MAINPLL_EN 0x0
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#define ALT_CLKMGR_MAINPLL_BYPASS 0xc
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#define ALT_CLKMGR_MAINPLL_MPUCLK 0x18
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#define ALT_CLKMGR_MAINPLL_NOCCLK 0x1c
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#define ALT_CLKMGR_MAINPLL_CNTR2CLK 0x20
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#define ALT_CLKMGR_MAINPLL_CNTR3CLK 0x24
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#define ALT_CLKMGR_MAINPLL_CNTR4CLK 0x28
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#define ALT_CLKMGR_MAINPLL_CNTR5CLK 0x2c
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#define ALT_CLKMGR_MAINPLL_CNTR6CLK 0x30
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#define ALT_CLKMGR_MAINPLL_CNTR7CLK 0x34
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#define ALT_CLKMGR_MAINPLL_CNTR8CLK 0x38
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#define ALT_CLKMGR_MAINPLL_CNTR9CLK 0x3c
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#define ALT_CLKMGR_MAINPLL_NOCDIV 0x40
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#define ALT_CLKMGR_MAINPLL_PLLGLOB 0x44
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#define ALT_CLKMGR_MAINPLL_FDBCK 0x48
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#define ALT_CLKMGR_MAINPLL_PLLC0 0x54
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#define ALT_CLKMGR_MAINPLL_PLLC1 0x58
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#define ALT_CLKMGR_MAINPLL_VCOCALIB 0x5c
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#define ALT_CLKMGR_MAINPLL_EN_RESET 0x000000ff
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#define ALT_CLKMGR_MAINPLL_FDBCK_MDIV(x) (((x) & 0xff000000) >> 24)
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#define ALT_CLKMGR_MAINPLL_PLLGLOB_PD_SET_MSK 0x00000001
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#define ALT_CLKMGR_MAINPLL_PLLGLOB_REFCLKDIV(x) (((x) & 0x00003f00) >> 8)
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#define ALT_CLKMGR_MAINPLL_PLLGLOB_RST_SET_MSK 0x00000002
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#define ALT_CLKMGR_MAINPLL_VCOCALIB_HSCNT_SET(x) (((x) << 0) & 0x000000ff)
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#define ALT_CLKMGR_MAINPLL_VCOCALIB_MSCNT_SET(x) (((x) << 9) & 0x0001fe00)
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#define ALT_CLKMGR_PSRC(x) (((x) & 0x00030000) >> 16)
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#define ALT_CLKMGR_SRC_MAIN 0
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#define ALT_CLKMGR_SRC_PER 1
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#define ALT_CLKMGR_PLLGLOB_PSRC_EOSC1 0x0
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#define ALT_CLKMGR_PLLGLOB_PSRC_INTOSC 0x1
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#define ALT_CLKMGR_PLLGLOB_PSRC_F2S 0x2
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#define ALT_CLKMGR_PERPLL 0xffd100a4
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#define ALT_CLKMGR_PERPLL_EN 0x0
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#define ALT_CLKMGR_PERPLL_EN_SDMMCCLK BIT(5)
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#define ALT_CLKMGR_PERPLL_BYPASS 0xc
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#define ALT_CLKMGR_PERPLL_CNTR2CLK 0x18
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#define ALT_CLKMGR_PERPLL_CNTR3CLK 0x1c
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#define ALT_CLKMGR_PERPLL_CNTR4CLK 0x20
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#define ALT_CLKMGR_PERPLL_CNTR5CLK 0x24
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#define ALT_CLKMGR_PERPLL_CNTR6CLK 0x28
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#define ALT_CLKMGR_PERPLL_CNTR7CLK 0x2c
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#define ALT_CLKMGR_PERPLL_CNTR8CLK 0x30
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#define ALT_CLKMGR_PERPLL_CNTR9CLK 0x34
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#define ALT_CLKMGR_PERPLL_GPIODIV 0x3c
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#define ALT_CLKMGR_PERPLL_EMACCTL 0x38
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#define ALT_CLKMGR_PERPLL_PLLGLOB 0x40
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#define ALT_CLKMGR_PERPLL_FDBCK 0x44
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#define ALT_CLKMGR_PERPLL_PLLC0 0x50
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#define ALT_CLKMGR_PERPLL_PLLC1 0x54
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#define ALT_CLKMGR_PERPLL_EN_RESET 0x00000fff
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#define ALT_CLKMGR_PERPLL_FDBCK_MDIV(x) (((x) & 0xff000000) >> 24)
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#define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET(x) (((x) << 0) & 0x0000ffff)
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#define ALT_CLKMGR_PERPLL_PLLGLOB_PD_SET_MSK 0x00000001
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#define ALT_CLKMGR_PERPLL_PLLGLOB_REFCLKDIV(x) (((x) & 0x00003f00) >> 8)
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#define ALT_CLKMGR_PERPLL_PLLGLOB_REFCLKDIV_SET(x) (((x) << 8) & 0x00003f00)
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#define ALT_CLKMGR_PERPLL_PLLGLOB_RST_SET_MSK 0x00000002
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#define ALT_CLKMGR_PERPLL_VCOCALIB_HSCNT_SET(x) (((x) << 0) & 0x000000ff)
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#define ALT_CLKMGR_PERPLL_VCOCALIB_MSCNT_SET(x) (((x) << 9) & 0x0001fe00)
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#define ALT_CLKMGR_PERPLL_VCOCALIB 0x58
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#define ALT_CLKMGR_INTOSC_HZ 460000000
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void config_clkmgr_handoff(handoff *hoff_ptr);
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uint32_t get_wdt_clk(void);
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uint32_t get_uart_clk(void);
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uint32_t get_mmc_clk(void);
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uint32_t get_l3_clk(uint32_t ref_clk);
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uint32_t get_cpu_clk(void);
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uint32_t get_ref_clk(uint32_t pllglob);
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uint32_t get_mpu_periph_clk(void);
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#endif
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