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Fix some clocks and reset binding values. Change-Id: Ibe480aa77cd0abb63d08bbee08ad4ec9d5d2a397 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
166 lines
3.8 KiB
C
166 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later or BSD-3-Clause */
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/*
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* Copyright (C) 2023-2024, STMicroelectronics - All Rights Reserved
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* Author(s): Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.
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*/
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#ifndef _DT_BINDINGS_STM32MP25_RESET_H_
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#define _DT_BINDINGS_STM32MP25_RESET_H_
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#define SYS_R 8192
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#define C1_R 8224
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#define C1P1POR_R 8256
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#define C1P1_R 8257
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#define C2_R 8288
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#define C2_HOLDBOOT_R 8608
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#define C1_HOLDBOOT_R 8609
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#define VSW_R 8735
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#define C1MS_R 8840
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#define IWDG2_KER_R 9106
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#define IWDG4_KER_R 9234
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#define C3_R 9344
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#define DDRCP_R 9888
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#define DDRCAPB_R 9920
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#define DDRPHYCAPB_R 9952
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#define DDRCFG_R 10016
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#define DDR_R 10048
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#define OSPI1_R 10400
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#define OSPI1DLL_R 10416
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#define OSPI2_R 10432
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#define OSPI2DLL_R 10448
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#define FMC_R 10464
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#define DBG_R 10508
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#define GPIOA_R 10592
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#define GPIOB_R 10624
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#define GPIOC_R 10656
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#define GPIOD_R 10688
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#define GPIOE_R 10720
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#define GPIOF_R 10752
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#define GPIOG_R 10784
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#define GPIOH_R 10816
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#define GPIOI_R 10848
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#define GPIOJ_R 10880
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#define GPIOK_R 10912
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#define GPIOZ_R 10944
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#define HPDMA1_R 10976
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#define HPDMA2_R 11008
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#define HPDMA3_R 11040
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#define LPDMA_R 11072
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#define HSEM_R 11104
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#define IPCC1_R 11136
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#define IPCC2_R 11168
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#define IS2M_R 11360
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#define SSMOD_R 11392
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#define TIM1_R 14336
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#define TIM2_R 14368
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#define TIM3_R 14400
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#define TIM4_R 14432
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#define TIM5_R 14464
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#define TIM6_R 14496
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#define TIM7_R 14528
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#define TIM8_R 14560
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#define TIM10_R 14592
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#define TIM11_R 14624
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#define TIM12_R 14656
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#define TIM13_R 14688
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#define TIM14_R 14720
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#define TIM15_R 14752
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#define TIM16_R 14784
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#define TIM17_R 14816
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#define TIM20_R 14848
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#define LPTIM1_R 14880
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#define LPTIM2_R 14912
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#define LPTIM3_R 14944
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#define LPTIM4_R 14976
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#define LPTIM5_R 15008
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#define SPI1_R 15040
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#define SPI2_R 15072
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#define SPI3_R 15104
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#define SPI4_R 15136
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#define SPI5_R 15168
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#define SPI6_R 15200
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#define SPI7_R 15232
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#define SPI8_R 15264
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#define SPDIFRX_R 15296
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#define USART1_R 15328
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#define USART2_R 15360
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#define USART3_R 15392
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#define UART4_R 15424
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#define UART5_R 15456
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#define USART6_R 15488
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#define UART7_R 15520
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#define UART8_R 15552
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#define UART9_R 15584
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#define LPUART1_R 15616
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#define I2C1_R 15648
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#define I2C2_R 15680
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#define I2C3_R 15712
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#define I2C4_R 15744
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#define I2C5_R 15776
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#define I2C6_R 15808
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#define I2C7_R 15840
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#define I2C8_R 15872
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#define SAI1_R 15904
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#define SAI2_R 15936
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#define SAI3_R 15968
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#define SAI4_R 16000
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#define MDF1_R 16064
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#define MDF2_R 16096
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#define FDCAN_R 16128
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#define HDP_R 16160
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#define ADC12_R 16192
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#define ADC3_R 16224
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#define ETH1_R 16256
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#define ETH2_R 16288
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#define USB2_R 16352
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#define USB2PHY1_R 16384
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#define USB2PHY2_R 16416
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#define USB3DR_R 16448
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#define USB3PCIEPHY_R 16480
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#define PCIE_R 16512
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#define USBTC_R 16544
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#define ETHSW_R 16576
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#define SDMMC1_R 16768
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#define SDMMC1DLL_R 16784
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#define SDMMC2_R 16800
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#define SDMMC2DLL_R 16816
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#define SDMMC3_R 16832
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#define SDMMC3DLL_R 16848
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#define GPU_R 16864
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#define LTDC_R 16896
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#define DSI_R 16928
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#define LVDS_R 17024
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#define CSI_R 17088
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#define DCMIPP_R 17120
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#define CCI_R 17152
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#define VDEC_R 17184
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#define VENC_R 17216
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#define RNG_R 17280
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#define PKA_R 17312
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#define SAES_R 17344
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#define HASH_R 17376
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#define CRYP1_R 17408
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#define CRYP2_R 17440
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#define WWDG1_R 17632
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#define WWDG2_R 17664
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#define VREF_R 17728
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#define DTS_R 17760
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#define CRC_R 17824
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#define SERC_R 17856
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#define OSPIIOM_R 17888
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#define I3C1_R 17984
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#define I3C2_R 18016
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#define I3C3_R 18048
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#define I3C4_R 18080
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#define RST_SCMI_C1_R 0
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#define RST_SCMI_C2_R 1
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#define RST_SCMI_C1_HOLDBOOT_R 2
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#define RST_SCMI_C2_HOLDBOOT_R 3
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#define RST_SCMI_FMC 4
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#define RST_SCMI_OSPI1 5
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#define RST_SCMI_OSPI1DLL 6
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#define RST_SCMI_OSPI2 7
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#define RST_SCMI_OSPI2DLL 8
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#endif /* _DT_BINDINGS_STM32MP25_RESET_H_ */
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