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70bc74441b
The ID field populated for every FVP PWRC register interface must be computed from the affinity level values from MPIDR. Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: If1474fd25704911f8f717dafb419a0734b99a4ec
104 lines
2.2 KiB
C
104 lines
2.2 KiB
C
/*
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* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <drivers/arm/fvp/fvp_pwrc.h>
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#include <lib/bakery_lock.h>
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#include <lib/mmio.h>
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#include <plat/arm/common/plat_arm.h>
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#include <platform_def.h>
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#define FVP_PWRC_ID_MASK U(0x00FFFFFF)
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/*
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* TODO: Someday there will be a generic power controller api. At the moment
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* each platform has its own pwrc so just exporting functions is fine.
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*/
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ARM_INSTANTIATE_LOCK;
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/*
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* Core ID field is 24 bits wide and extracted from MPIDR.
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* Bits[23:16] represent Affinity Level 2
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* Bits[15:8] represent Affinity Level 1
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* Bits[7:0] represent Affinity Level 0
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*/
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static unsigned int fvp_pwrc_core_id(u_register_t mpidr)
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{
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return (unsigned int)(mpidr & FVP_PWRC_ID_MASK);
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}
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unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr)
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{
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unsigned int id = fvp_pwrc_core_id(mpidr);
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return PSYSR_WK(fvp_pwrc_read_psysr(id));
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}
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unsigned int fvp_pwrc_read_psysr(u_register_t mpidr)
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{
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unsigned int rc;
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unsigned int id = fvp_pwrc_core_id(mpidr);
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arm_lock_get();
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mmio_write_32(PWRC_BASE + PSYSR_OFF, id);
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rc = mmio_read_32(PWRC_BASE + PSYSR_OFF);
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arm_lock_release();
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return rc;
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}
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void fvp_pwrc_write_pponr(u_register_t mpidr)
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{
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unsigned int id = fvp_pwrc_core_id(mpidr);
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arm_lock_get();
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mmio_write_32(PWRC_BASE + PPONR_OFF, id);
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arm_lock_release();
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}
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void fvp_pwrc_write_ppoffr(u_register_t mpidr)
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{
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unsigned int id = fvp_pwrc_core_id(mpidr);
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arm_lock_get();
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mmio_write_32(PWRC_BASE + PPOFFR_OFF, id);
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arm_lock_release();
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}
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void fvp_pwrc_set_wen(u_register_t mpidr)
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{
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unsigned int id = fvp_pwrc_core_id(mpidr);
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arm_lock_get();
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mmio_write_32(PWRC_BASE + PWKUPR_OFF,
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(unsigned int) (PWKUPR_WEN | id));
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arm_lock_release();
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}
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void fvp_pwrc_clr_wen(u_register_t mpidr)
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{
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unsigned int id = fvp_pwrc_core_id(mpidr);
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arm_lock_get();
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mmio_write_32(PWRC_BASE + PWKUPR_OFF, id);
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arm_lock_release();
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}
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void fvp_pwrc_write_pcoffr(u_register_t mpidr)
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{
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unsigned int id = fvp_pwrc_core_id(mpidr);
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arm_lock_get();
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mmio_write_32(PWRC_BASE + PCOFFR_OFF, id);
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arm_lock_release();
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}
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/* Nothing else to do here apart from initializing the lock */
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void __init plat_arm_pwrc_setup(void)
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{
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arm_lock_init();
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}
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