Boyan Karatotev c9f352c362 fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset ... The model has a bug where it will not clear CPUPWRCTLR_EL1 on reset, even though the actual cores do. The write of 1 to the bit itself triggers the powerdown sequnece, regardless of the value before the write. As such, the bug does not impact functionality but it does throw off software reading it. Clear the bit on Travis and Gelas as they are the only ones to require reading it back. Change-Id: I765a7fa055733d522480be30d412e3b417af2bd7 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>		2025-02-05 14:18:49 +00:00
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aarch32	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
aarch64	fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset	2025-02-05 14:18:49 +00:00
cpu-ops.mk	fix(security): enable WORKAROUND_CVE_2024_7881 build option	2025-01-30 16:45:35 -06:00
errata_common.c	fix(cpus): modify the fix for Cortex-A75 erratum 764081	2024-10-03 10:07:47 -05:00
errata_report.c	refactor(cpus): directly invoke errata reporter	2024-07-26 11:19:52 +01:00