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https://github.com/ARM-software/arm-trusted-firmware.git
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c52a142b7c
When the TF-A is placed in DDR memory range, the DDR memory range is getting explicitly reserved in the default device tree by TF-A. This creates an error condition in the use case where Device tree is not present or it is present at a different location. To fix this, a new build time parameter, XILINX_OF_BOARD_DTB_ADDR, is introduced. The TF-A will reserve the DDR memory only when a valid DTB address is provided to XILINX_OF_BOARD_DTB_ADDR during build. Now the user has options, either manually reserve the desired DDR address range for TF-A in device tree or let TF-A access and modify the device tree, to reserve the DDR address range, in runtime using the build parameter. Change-Id: I846fa373ba9f7c984eda3a55ccaaa622082cad81 Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
146 lines
5.1 KiB
ReStructuredText
146 lines
5.1 KiB
ReStructuredText
Xilinx Zynq UltraScale+ MPSoC
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=============================
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Trusted Firmware-A (TF-A) implements the EL3 firmware layer for Xilinx Zynq
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UltraScale + MPSoC.
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The platform only uses the runtime part of TF-A as ZynqMP already has a
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BootROM (BL1) and FSBL (BL2).
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BL31 is TF-A.
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BL32 is an optional Secure Payload.
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BL33 is the non-secure world software (U-Boot, Linux etc).
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To build:
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.. code:: bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31
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To build bl32 TSP you have to rebuild bl31 too:
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.. code:: bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd RESET_TO_BL31=1 bl31 bl32
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To build TF-A for JTAG DCC console:
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.. code:: bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 ZYNQMP_CONSOLE=dcc
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ZynqMP platform specific build options
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--------------------------------------
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- ``XILINX_OF_BOARD_DTB_ADDR`` : Specifies the base address of Device tree.
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- ``ZYNQMP_ATF_MEM_BASE``: Specifies the base address of the bl31 binary.
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- ``ZYNQMP_ATF_MEM_SIZE``: Specifies the size of the memory region of the bl31 binary.
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- ``ZYNQMP_BL32_MEM_BASE``: Specifies the base address of the bl32 binary.
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- ``ZYNQMP_BL32_MEM_SIZE``: Specifies the size of the memory region of the bl32 binary.
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- ``ZYNQMP_CONSOLE``: Select the console driver. Options:
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- ``cadence``, ``cadence0``: Cadence UART 0
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- ``cadence1`` : Cadence UART 1
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ZynqMP Debug behavior
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---------------------
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With DEBUG=1, TF-A for ZynqMP uses DDR memory range instead of OCM memory range
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due to size constraints.
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For DEBUG=1 configuration for ZynqMP the BL31_BASE is set to the DDR location
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of 0x1000 and BL31_LIMIT is set to DDR location of 0x7FFFF. By default the
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above memory range will NOT be reserved in device tree.
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To reserve the above memory range in device tree, the device tree base address
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must be provided during build as,
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \
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XILINX_OF_BOARD_DTB_ADDR=<DTB address> bl31
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The default DTB base address for ZynqMP platform is 0x100000. This default value
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is not set in the code and to use this default address, user still needs to
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provide it through the build command as above.
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If the user wants to move the bl31 to a different DDR location, user can provide
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the DDR address location using the build time parameters ZYNQMP_ATF_MEM_BASE and
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ZYNQMP_ATF_MEM_SIZE.
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The DDR address must be reserved in the DTB by the user, either by manually
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adding the reserved memory node, in the device tree, with the required address
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range OR let TF-A modify the device tree on the run.
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To let TF-A access and modify the device tree, the DTB address must be provided
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to the build command as follows,
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \
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ZYNQMP_ATF_MEM_BASE=<DDR address> ZYNQMP_ATF_MEM_SIZE=<size> \
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XILINX_OF_BOARD_DTB_ADDR=<DTB address> bl31
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FSBL->TF-A Parameter Passing
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----------------------------
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The FSBL populates a data structure with image information for TF-A. TF-A uses
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that data to hand off to the loaded images. The address of the handoff data
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structure is passed in the ``PMU_GLOBAL.GLOBAL_GEN_STORAGE6`` register. The
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register is free to be used by other software once TF-A has brought up
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further firmware images.
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Power Domain Tree
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-----------------
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The following power domain tree represents the power domain model used by TF-A
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for ZynqMP:
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::
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+-+
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|0|
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+-+
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+-------+---+---+-------+
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v v v v
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+-+ +-+ +-+ +-+
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|0| |1| |2| |3|
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+-+ +-+ +-+ +-+
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The 4 leaf power domains represent the individual A53 cores, while resources
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common to the cluster are grouped in the power domain on the top.
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CUSTOM SIP service support
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--------------------------
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- Dedicated SMC FID ZYNQMP_SIP_SVC_CUSTOM(0x82002000)(32-bit)/
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(0xC2002000)(64-bit) to be used by a custom package for
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providing CUSTOM SIP service.
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- by default platform provides bare minimum definition for
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custom_smc_handler in this service.
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- to use this service, custom package should implement their
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smc handler with the name custom_smc_handler. once custom package is
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included in TF-A build, their definition of custom_smc_handler is
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enabled.
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Custom package makefile fragment inclusion in TF-A build
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--------------------------------------------------------
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- custom package is not directly part of TF-A source.
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- <CUSTOM_PKG_PATH> is the location at which user clones a
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custom package locally.
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- custom package needs to implement makefile fragment named
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custom_pkg.mk so as to get included in TF-A build.
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- custom_pkg.mk specify all the rules to include custom package
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specific header files, dependent libs, source files that are
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supposed to be included in TF-A build.
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- when <CUSTOM_PKG_PATH> is specified in TF-A build command,
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custom_pkg.mk is included from <CUSTOM_PKG_PATH> in TF-A build.
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- TF-A build command:
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1
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bl31 CUSTOM_PKG_PATH=<...>
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