mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-05-03 09:29:57 +00:00
f5360cfa81
At the moment we only support FEAT_TRBE to be either unconditionally compiled in, or to be not supported at all. Add support for runtime detection (ENABLE_TRBE_FOR_NS=2), by splitting is_feat_trbe_present() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we access TRBE related registers. The FVP platform decided to compile in support unconditionally (=1), even though FEAT_TRBE is an ARMv9 feature, so is not available with the FVP model's default command line. Change that to the now supported dynamic option (=2), so the right decision can be made by the code at runtime. Change-Id: Iee7f88ea930119049543a8a4a105389997e7692c Signed-off-by: Andre Przywara <andre.przywara@arm.com>
53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
/*
|
|
* Copyright (c) 2021-2022, Arm Limited. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#include <arch.h>
|
|
#include <arch_features.h>
|
|
#include <arch_helpers.h>
|
|
#include <lib/el3_runtime/pubsub.h>
|
|
#include <lib/extensions/trbe.h>
|
|
|
|
static void tsb_csync(void)
|
|
{
|
|
/*
|
|
* The assembler does not yet understand the tsb csync mnemonic
|
|
* so use the equivalent hint instruction.
|
|
*/
|
|
__asm__ volatile("hint #18");
|
|
}
|
|
|
|
void trbe_enable(void)
|
|
{
|
|
uint64_t val;
|
|
|
|
/*
|
|
* MDCR_EL3.NSTB = 0b11
|
|
* Allow access of trace buffer control registers from NS-EL1
|
|
* and NS-EL2, tracing is prohibited in Secure and Realm state
|
|
* (if implemented).
|
|
*/
|
|
val = read_mdcr_el3();
|
|
val |= MDCR_NSTB(MDCR_NSTB_EL1);
|
|
write_mdcr_el3(val);
|
|
}
|
|
|
|
static void *trbe_drain_trace_buffers_hook(const void *arg __unused)
|
|
{
|
|
if (is_feat_trbe_supported()) {
|
|
/*
|
|
* Before switching from normal world to secure world
|
|
* the trace buffers need to be drained out to memory. This is
|
|
* required to avoid an invalid memory access when TTBR is switched
|
|
* for entry to S-EL1.
|
|
*/
|
|
tsb_csync();
|
|
dsbnsh();
|
|
}
|
|
|
|
return (void *)0;
|
|
}
|
|
|
|
SUBSCRIBE_TO_EVENT(cm_entering_secure_world, trbe_drain_trace_buffers_hook);
|