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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/*
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* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <drivers/arm/gicv2.h>
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#include <lib/mmio.h>
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#include "rcar_def.h"
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#define SWDT_ERROR_ID (1024U)
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#define SWDT_ERROR_TYPE (16U)
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#define SWDT_CHAR_MAX (13U)
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extern void rcar_swdt_release(void);
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void bl2_interrupt_error_id(uint32_t int_id)
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{
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ERROR("\n");
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if (int_id >= SWDT_ERROR_ID) {
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ERROR("Unhandled exception occurred.\n");
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ERROR(" Exception type = FIQ_SP_ELX\n");
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panic();
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}
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/* Clear the interrupt request */
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gicv2_end_of_interrupt((uint32_t) int_id);
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rcar_swdt_release();
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ERROR("Unhandled exception occurred.\n");
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ERROR(" Exception type = FIQ_SP_ELX\n");
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1());
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ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1());
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ERROR("\n");
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panic();
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}
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void bl2_interrupt_error_type(uint32_t ex_type)
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{
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const uint8_t interrupt_ex[SWDT_ERROR_TYPE][SWDT_CHAR_MAX] = {
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"SYNC SP EL0",
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"IRQ SP EL0",
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"FIQ SP EL0",
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"SERR SP EL0",
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"SYNC SP ELx",
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"IRQ SP ELx",
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"FIQ SP ELx",
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"SERR SP ELx",
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"SYNC AARCH64",
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"IRQ AARCH64",
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"FIQ AARCH64",
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"SERR AARCH64",
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"SYNC AARCH32",
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"IRQ AARCH32",
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"FIQ AARCH32",
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"SERR AARCH32"
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};
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char msg[128];
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/* Clear the interrupt request */
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if (ex_type >= SWDT_ERROR_TYPE) {
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ERROR("\n");
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ERROR("Unhandled exception occurred.\n");
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ERROR(" Exception type = Unknown (%d)\n", ex_type);
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goto loop;
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}
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rcar_swdt_release();
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ERROR("\n");
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ERROR("Unhandled exception occurred.\n");
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snprintf(msg, sizeof(msg), " Exception type = %s\n",
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&interrupt_ex[ex_type][0]);
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ERROR("%s", msg);
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switch (ex_type) {
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case SYNC_EXCEPTION_SP_ELX:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1());
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ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1());
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break;
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case IRQ_SP_ELX:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt());
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break;
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case FIQ_SP_ELX:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt());
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break;
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case SERROR_SP_ELX:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1());
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ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1());
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break;
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default:
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break;
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}
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loop:
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ERROR("\n");
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panic();
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}
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