mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-05-08 18:41:22 +00:00
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
118 lines
3.1 KiB
ArmAsm
118 lines
3.1 KiB
ArmAsm
/*
|
|
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
#ifndef ROCKCHIP_PLAT_MACROS_S
|
|
#define ROCKCHIP_PLAT_MACROS_S
|
|
|
|
#include <drivers/arm/cci.h>
|
|
#include <drivers/arm/gic_common.h>
|
|
#include <drivers/arm/gicv2.h>
|
|
#include <drivers/arm/gicv3.h>
|
|
#include <platform_def.h>
|
|
|
|
.section .rodata.gic_reg_name, "aS"
|
|
/* Applicable only to GICv2 and GICv3 with SRE disabled (legacy mode) */
|
|
gicc_regs:
|
|
.asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
|
|
|
|
/* Applicable only to GICv3 with SRE enabled */
|
|
icc_regs:
|
|
.asciz "icc_hppir0_el1", "icc_hppir1_el1", "icc_ctlr_el3", ""
|
|
|
|
/* Registers common to both GICv2 and GICv3 */
|
|
gicd_pend_reg:
|
|
.asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
|
|
" Offset:\t\t\tvalue\n"
|
|
newline:
|
|
.asciz "\n"
|
|
spacer:
|
|
.asciz ":\t\t0x"
|
|
|
|
.section .rodata.cci_reg_name, "aS"
|
|
cci_iface_regs:
|
|
.asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
|
|
|
|
/* ---------------------------------------------
|
|
* The below utility macro prints out relevant GIC
|
|
* and CCI registers whenever an unhandled
|
|
* exception is taken in BL31.
|
|
* Expects: GICD base in x26, GICC base in x27
|
|
* Clobbers: x0 - x10, sp
|
|
* ---------------------------------------------
|
|
*/
|
|
.macro plat_crash_print_regs
|
|
|
|
mov_imm x26, PLAT_RK_GICD_BASE
|
|
mov_imm x27, PLAT_RK_GICC_BASE
|
|
|
|
/* Check for GICv3 system register access */
|
|
mrs x7, id_aa64pfr0_el1
|
|
ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
|
|
cmp x7, #1
|
|
b.ne print_gicv2
|
|
|
|
/* Check for SRE enable */
|
|
mrs x8, ICC_SRE_EL3
|
|
tst x8, #ICC_SRE_SRE_BIT
|
|
b.eq print_gicv2
|
|
|
|
/* Load the icc reg list to x6 */
|
|
adr x6, icc_regs
|
|
/* Load the icc regs to gp regs used by str_in_crash_buf_print */
|
|
mrs x8, ICC_HPPIR0_EL1
|
|
mrs x9, ICC_HPPIR1_EL1
|
|
mrs x10, ICC_CTLR_EL3
|
|
/* Store to the crash buf and print to console */
|
|
bl str_in_crash_buf_print
|
|
b print_gic_common
|
|
|
|
print_gicv2:
|
|
/* Load the gicc reg list to x6 */
|
|
adr x6, gicc_regs
|
|
/* Load the gicc regs to gp regs used by str_in_crash_buf_print */
|
|
ldr w8, [x27, #GICC_HPPIR]
|
|
ldr w9, [x27, #GICC_AHPPIR]
|
|
ldr w10, [x27, #GICC_CTLR]
|
|
/* Store to the crash buf and print to console */
|
|
bl str_in_crash_buf_print
|
|
|
|
print_gic_common:
|
|
/* Print the GICD_ISPENDR regs */
|
|
add x7, x26, #GICD_ISPENDR
|
|
adr x4, gicd_pend_reg
|
|
bl asm_print_str
|
|
gicd_ispendr_loop:
|
|
sub x4, x7, x26
|
|
cmp x4, #0x280
|
|
b.eq exit_print_gic_regs
|
|
bl asm_print_hex
|
|
|
|
adr x4, spacer
|
|
bl asm_print_str
|
|
|
|
ldr x4, [x7], #8
|
|
bl asm_print_hex
|
|
|
|
adr x4, newline
|
|
bl asm_print_str
|
|
b gicd_ispendr_loop
|
|
exit_print_gic_regs:
|
|
|
|
#if PLATFORM_CLUSTER_COUNT > 1
|
|
adr x6, cci_iface_regs
|
|
/* Store in x7 the base address of the first interface */
|
|
mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
|
PLAT_RK_CCI_CLUSTER0_SL_IFACE_IX))
|
|
ldr w8, [x7, #SNOOP_CTRL_REG]
|
|
/* Store in x7 the base address of the second interface */
|
|
mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
|
PLAT_RK_CCI_CLUSTER1_SL_IFACE_IX))
|
|
ldr w9, [x7, #SNOOP_CTRL_REG]
|
|
/* Store to the crash buf and print to console */
|
|
bl str_in_crash_buf_print
|
|
#endif
|
|
.endm
|
|
|
|
#endif /* ROCKCHIP_PLAT_MACROS_S */
|