Arvind Ram Prakash b36e975ea3 feat(trbe): introduce trbe_disable() function ... This patch adds trbe_disable() which disables Trace buffer access from lower ELs in all security state. This function makes Secure state the owner of Trace buffer and access from EL2/EL1 generate trap exceptions to EL3. Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: If3e3bd621684b3c28f44c3ed2fe3df30b143f8cd		2024-07-29 20:35:14 +01:00
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amu	refactor(cm): move EL3 registers to global context	2023-10-31 11:18:42 +00:00
brbe	feat(cm): context switch MDCR_EL3 register	2024-06-25 13:50:32 +01:00
debug	feat(debugv8p9): add support for FEAT_Debugv8p9	2024-07-18 13:49:43 -05:00
fgt	feat(fgt2): add support for FEAT_FGT2	2024-07-18 13:49:43 -05:00
mpam	refactor(cm): move MPAM3_EL3 reg to per world context	2023-12-21 12:37:21 +00:00
pauth	chore(pauth): remove redundant pauth_disable_el3() call	2023-04-28 08:09:14 +01:00
pmuv3	fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32	2024-04-02 16:17:03 +02:00
ras	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
sme	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
spe	feat(spe): introduce spe_disable() function	2024-07-29 20:34:18 +01:00
sve	refactor(cm): move EL3 registers to global context	2023-10-31 11:18:42 +00:00
sys_reg_trace	refactor(cm): move EL3 registers to global context	2023-10-31 11:18:42 +00:00
trbe	feat(trbe): introduce trbe_disable() function	2024-07-29 20:35:14 +01:00
trf	feat(cm): context switch MDCR_EL3 register	2024-06-25 13:50:32 +01:00