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feat(debugv8p9): add support for FEAT_Debugv8p9

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This patch enables FEAT_Debugv8p9 and prevents EL1/0 from
trapping to EL3 when accessing MDSELR_EL1 register by
setting the MDCR_EL3.EBWE bit.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I3613af1dd8cb8c0d3c33dc959f170846c0b9695a
This commit is contained in:
Arvind Ram Prakash 2024-05-22 15:24:00 -05:00
parent 847cee8c64
commit 83271d5a5a
12 changed files with 102 additions and 1 deletions
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2
Makefile
View file

@ -1227,6 +1227,7 @@ $(eval $(call assert_numerics,\
ENABLE_FEAT_AMUv1p1 \
ENABLE_FEAT_CSV2_2 \
ENABLE_FEAT_CSV2_3 \
ENABLE_FEAT_DEBUGV8P9 \
ENABLE_FEAT_DIT \
ENABLE_FEAT_ECV \
ENABLE_FEAT_FGT \
@ -1297,6 +1298,7 @@ $(eval $(call add_defines,\
AMU_RESTRICT_COUNTERS \
ENABLE_ASSERTIONS \
ENABLE_BTI \
ENABLE_FEAT_DEBUGV8P9 \
ENABLE_FEAT_MPAM \
ENABLE_PAUTH \
ENABLE_PIE \

4
bl31/bl31.mk
View file

@ -120,6 +120,10 @@ ifneq (${ENABLE_FEAT_MPAM},0)
BL31_SOURCES += lib/extensions/mpam/mpam.c
endif
ifneq (${ENABLE_FEAT_DEBUGV8P9},0)
BL31_SOURCES += lib/extensions/debug/debugv8p9.c
endif
ifneq (${ENABLE_TRBE_FOR_NS},0)
BL31_SOURCES += lib/extensions/trbe/trbe.c
endif

3
changelog.yaml
View file

@ -107,6 +107,9 @@ subsections:
- title: CPU feature / ID register handling in general
scope: cpufeat
- title: Debug Extension (FEAT_Debugv8p9)
scope: debugv8p9
- title: Guarded Control Stack (FEAT_GCS)
scope: gcs

8
common/feat_detect.c
View file

@ -94,6 +94,12 @@ static unsigned int read_feat_csv2_id_field(void)
ID_AA64PFR0_CSV2_MASK);
}
static unsigned int read_feat_debugv8p9_id_field(void)
{
return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_DEBUGVER_SHIFT,
ID_AA64DFR0_DEBUGVER_MASK);
}
static unsigned int read_feat_pmuv3_id_field(void)
{
return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMUVER_SHIFT,
@ -356,6 +362,8 @@ void detect_arch_features(void)
"S1POE", 1, 1);
check_feature(ENABLE_FEAT_CSV2_3, read_feat_csv2_id_field(),
"CSV2_3", 3, 3);
check_feature(ENABLE_FEAT_DEBUGV8P9, read_feat_debugv8p9_id_field(),
"DEBUGV8P9", 11, 11);
/* v9.0 features */
check_feature(ENABLE_BRBE_FOR_NS, read_feat_brbe_id_field(),

6
docs/getting_started/build-options.rst
View file

@ -320,6 +320,12 @@ Common build options
The flag can take values 0 to 2, to align with the ``ENABLE_FEAT``
mechanism. Default value is ``0``.
- ``ENABLE_FEAT_DEBUGV8P9``: Numeric value to enable ``FEAT_DEBUGV8P9``
extension which allows the ability to implement more than 16 breakpoints
and/or watchpoints. This feature is mandatory from v8.9 and is optional
from v8.8. This flag can take the values of 0 to 2, to align with the
``ENABLE_FEAT`` mechanism. Default value is ``0``.
- ``ENABLE_FEAT_DIT``: Numeric value to enable ``FEAT_DIT`` (Data Independent
Timing) extension. It allows setting the ``DIT`` bit of PSTATE in EL3.
``FEAT_DIT`` is a mandatory architectural feature and is enabled from v8.4

6
include/arch/aarch64/arch.h
View file

@ -224,6 +224,11 @@
#define EL_IMPL_A64ONLY ULL(1)
#define EL_IMPL_A64_A32 ULL(2)
/* ID_AA64DFR0_EL1.DebugVer definitions */
#define ID_AA64DFR0_DEBUGVER_SHIFT U(0)
#define ID_AA64DFR0_DEBUGVER_MASK ULL(0xf)
#define DEBUGVER_V8P9_IMPLEMENTED ULL(0xb)
/* ID_AA64DFR0_EL1.TraceVer definitions */
#define ID_AA64DFR0_TRACEVER_SHIFT U(4)
#define ID_AA64DFR0_TRACEVER_MASK ULL(0xf)
@ -607,6 +612,7 @@
#define SCR_RESET_VAL SCR_RES1_BITS
/* MDCR_EL3 definitions */
#define MDCR_EBWE_BIT (ULL(1) << 43)
#define MDCR_EnPMSN_BIT (ULL(1) << 36)
#define MDCR_MPMX_BIT (ULL(1) << 35)
#define MDCR_MCCD_BIT (ULL(1) << 34)

17
include/arch/aarch64/arch_features.h
View file

@ -288,6 +288,23 @@ static inline bool is_feat_mpam_present(void)
CREATE_FEATURE_SUPPORTED(feat_mpam, is_feat_mpam_present, ENABLE_FEAT_MPAM)
/*
* FEAT_DebugV8P9: Debug extension. This function checks the field 3:0 of
* ID_AA64DFR0 Aarch64 Debug Feature Register 0 for the version of
* Feat_Debug supported. The value of the field determines feature presence
*
* 0b0110 - Arm v8.0 debug
* 0b0111 - Arm v8.0 debug architecture with Virtualization host extensions
* 0x1000 - FEAT_Debugv8p2 is supported
* 0x1001 - FEAT_Debugv8p4 is supported
* 0x1010 - FEAT_Debugv8p8 is supported
* 0x1011 - FEAT_Debugv8p9 is supported
*
*/
CREATE_FEATURE_FUNCS(feat_debugv8p9, id_aa64dfr0_el1, ID_AA64DFR0_DEBUGVER_SHIFT,
ID_AA64DFR0_DEBUGVER_MASK, DEBUGVER_V8P9_IMPLEMENTED,
ENABLE_FEAT_DEBUGV8P9)
/* FEAT_HCX: Extended Hypervisor Configuration Register */
CREATE_FEATURE_FUNCS(feat_hcx, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_HCX_SHIFT,
ID_AA64MMFR1_EL1_HCX_MASK, 1U, ENABLE_FEAT_HCX)

20
include/lib/extensions/debug_v8p9.h Normal file
View file

@ -0,0 +1,20 @@
/*
* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef DEBUG_V8P9_H
#define DEBUG_V8P9_H
#include <context.h>
#if ENABLE_FEAT_DEBUGV8P9
void debugv8p9_extended_bp_wp_enable(cpu_context_t *ctx);
#else
static inline void debugv8p9_extended_bp_wp_enable(cpu_context_t *ctx)
{
}
#endif /* ENABLE_FEAT_DEBUGV8P9 */
#endif /* DEBUG_V8P9_H */

5
lib/el3_runtime/aarch64/context_mgmt.c
View file

@ -24,6 +24,7 @@
#include <lib/el3_runtime/pubsub_events.h>
#include <lib/extensions/amu.h>
#include <lib/extensions/brbe.h>
#include <lib/extensions/debug_v8p9.h>
#include <lib/extensions/mpam.h>
#include <lib/extensions/pmuv3.h>
#include <lib/extensions/sme.h>
@ -772,6 +773,10 @@ static void manage_extensions_nonsecure(cpu_context_t *ctx)
sme_enable(ctx);
}
if (is_feat_debugv8p9_supported()) {
debugv8p9_extended_bp_wp_enable(ctx);
}
pmuv3_enable(ctx);
#endif /* IMAGE_BL31 */
}

26
lib/extensions/debug/debugv8p9.c Normal file
View file

@ -0,0 +1,26 @@
/*
* Copyright (c) 2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <arch_features.h>
#include <arch_helpers.h>
#include <lib/extensions/debug_v8p9.h>
void debugv8p9_extended_bp_wp_enable(cpu_context_t *ctx)
{
el3_state_t *state = get_el3state_ctx(ctx);
u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3);
/* When FEAT_Debugv8p9 is implemented:
*
* MDCR_EL3.EBWE: Set to 0b1
* Enables use of additional breakpoints or watchpoints,
* and disables trap to EL3 on accesses to debug register.
*/
mdcr_el3_val |= MDCR_EBWE_BIT;
write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
}

5
make_helpers/arch_features.mk
View file

@ -90,7 +90,7 @@ endif
# Enable the features which are mandatory from ARCH version 8.9 and upwards.
ifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
armv8-9-a-feats := ENABLE_FEAT_TCR2
armv8-9-a-feats := ENABLE_FEAT_TCR2 ENABLE_FEAT_DEBUGV8P9
# 8.8 Compliant
armv8-9-a-feats += ${armv8-8-a-feats}
FEAT_LIST := ${armv8-9-a-feats}
@ -353,6 +353,9 @@ ENABLE_FEAT_S2POE ?= 0
# Flag to enable access to Stage 1 Permission Overlay (FEAT_S1POE).
ENABLE_FEAT_S1POE ?= 0
# Flag to enable access to Arm v8.9 Debug extension
ENABLE_FEAT_DEBUGV8P9 ?= 0
#----
# 9.0
#----

1
plat/arm/board/fvp/platform.mk
View file

@ -57,6 +57,7 @@ endif
ENABLE_SYS_REG_TRACE_FOR_NS := 2
ENABLE_FEAT_CSV2_2 := 2
ENABLE_FEAT_CSV2_3 := 2
ENABLE_FEAT_DEBUGV8P9 := 2
ENABLE_FEAT_DIT := 2
ENABLE_FEAT_PAN := 2
ENABLE_FEAT_VHE := 2