Sona Mathew aed3e8b59a fix(cpus): workaround for CVE-2024-5660 for Cortex-A77 ... Implements mitigation for CVE-2024-5660 that affects Cortex-A77 revisions r0p0, r1p0, r1p1. The workaround is to disable the hardware page aggregation at EL3 by setting CPUECTLR_EL1[46] = 1'b1. Public Documentation: https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-5660 Change-Id: Ic71b163883ea624e9f2f77deb8b30c69612938b9 Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>		2024-12-17 10:28:09 -06:00
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aarch32	refactor(cpus): remove cpu specific errata funcs	2024-07-26 11:19:52 +01:00
aarch64	fix(cpus): workaround for CVE-2024-5660 for Cortex-A77	2024-12-17 10:28:09 -06:00
cpu-ops.mk	fix(cpus): workaround for CVE-2024-5660 for Cortex-X4	2024-12-17 10:24:33 -06:00
errata_common.c	fix(cpus): modify the fix for Cortex-A75 erratum 764081	2024-10-03 10:07:47 -05:00
errata_report.c	refactor(cpus): directly invoke errata reporter	2024-07-26 11:19:52 +01:00