Jay Buddhabhatti ade92a64e4 feat(xilinx): add handler for power down req sgi irq ... On receiving CPU power down callback, TF-A raises SGI interrupt to all active cores to power down each active cores. Add handler for this SGI IRQ. By default TF-A uses SGI 6 for CPU power down request. This can be configurable through CPU_PWRDWN_SGI build flag. e.g., If user wants to use SGI 7 instead of SGI 6 then provide build flag CPU_PWRDWN_SGI=7 Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Id0df32187d1de3f0af4486eb4d4930cb3ab01dbd		2024-01-09 04:15:27 -08:00
..
aarch64	fix(versal-net): use arm common GIC handlers	2024-01-09 00:38:21 -08:00
include	feat(xilinx): add handler for power down req sgi irq	2024-01-09 04:15:27 -08:00
pm_service	fix(versal-net): don't clear pending interrupts	2023-08-17 12:37:05 -07:00
tsp	build(versal-net): reorganize platform source files	2023-12-04 05:52:07 +01:00
bl31_versal_net_setup.c	fix(versal-net): use arm common GIC handlers	2024-01-09 00:38:21 -08:00
plat_psci.c	fix(versal-net): use arm common GIC handlers	2024-01-09 00:38:21 -08:00
plat_psci_pm.c	fix(versal-net): use arm common GIC handlers	2024-01-09 00:38:21 -08:00
plat_topology.c	feat(xilinx): sync copyright format	2023-04-26 10:28:37 +02:00
platform.mk	feat(xilinx): add handler for power down req sgi irq	2024-01-09 04:15:27 -08:00
sip_svc_setup.c	chore(xilinx): follow kernel doc format for functional documentation	2023-06-23 08:07:13 +01:00
versal_net_ipi.c	feat(versal-net): add bufferless IPI Support	2023-12-05 06:59:51 +01:00