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This patch extends the build option `USE_COHERENT_MEMORY` to conditionally remove coherent memory from the memory maps of all boot loader stages. The patch also adds necessary documentation for coherent memory removal in firmware-design, porting and user guides. Fixes ARM-Software/tf-issues#106 Change-Id: I260e8768c6a5c2efc402f5804a80657d8ce38773
160 lines
5.8 KiB
C
160 lines
5.8 KiB
C
/*
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __FVP_PRIVATE_H__
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#define __FVP_PRIVATE_H__
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#include <bakery_lock.h>
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#include <bl_common.h>
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#include <cpu_data.h>
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#include <platform_def.h>
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typedef volatile struct mailbox {
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unsigned long value
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__attribute__((__aligned__(CACHE_WRITEBACK_GRANULE)));
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} mailbox_t;
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/*******************************************************************************
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* This structure represents the superset of information that is passed to
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* BL31 e.g. while passing control to it from BL2 which is bl31_params
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* and bl31_plat_params and its elements
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******************************************************************************/
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typedef struct bl2_to_bl31_params_mem {
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bl31_params_t bl31_params;
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image_info_t bl31_image_info;
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image_info_t bl32_image_info;
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image_info_t bl33_image_info;
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entry_point_info_t bl33_ep_info;
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entry_point_info_t bl32_ep_info;
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entry_point_info_t bl31_ep_info;
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} bl2_to_bl31_params_mem_t;
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#if USE_COHERENT_MEM
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/*
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* These are wrapper macros to the Coherent Memory Bakery Lock API.
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*/
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#define fvp_lock_init(_lock_arg) bakery_lock_init(_lock_arg)
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#define fvp_lock_get(_lock_arg) bakery_lock_get(_lock_arg)
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#define fvp_lock_release(_lock_arg) bakery_lock_release(_lock_arg)
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#else
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/*******************************************************************************
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* Constants to specify how many bakery locks this platform implements. These
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* are used if the platform chooses not to use coherent memory for bakery lock
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* data structures.
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******************************************************************************/
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#define FVP_MAX_BAKERIES 1
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#define FVP_PWRC_BAKERY_ID 0
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/*******************************************************************************
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* Definition of structure which holds platform specific per-cpu data. Currently
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* it holds only the bakery lock information for each cpu. Constants to
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* specify how many bakeries this platform implements and bakery ids are
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* specified in fvp_def.h
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******************************************************************************/
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typedef struct fvp_cpu_data {
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bakery_info_t pcpu_bakery_info[FVP_MAX_BAKERIES];
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} fvp_cpu_data_t;
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/* Macro to define the offset of bakery_info_t in fvp_cpu_data_t */
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#define FVP_CPU_DATA_LOCK_OFFSET __builtin_offsetof\
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(fvp_cpu_data_t, pcpu_bakery_info)
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/*******************************************************************************
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* Helper macros for bakery lock api when using the above fvp_cpu_data_t for
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* bakery lock data structures. It assumes that the bakery_info is at the
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* beginning of the platform specific per-cpu data.
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******************************************************************************/
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#define fvp_lock_init(_lock_arg) /* No init required */
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#define fvp_lock_get(_lock_arg) bakery_lock_get(_lock_arg, \
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CPU_DATA_PLAT_PCPU_OFFSET + \
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FVP_CPU_DATA_LOCK_OFFSET)
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#define fvp_lock_release(_lock_arg) bakery_lock_release(_lock_arg, \
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CPU_DATA_PLAT_PCPU_OFFSET + \
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FVP_CPU_DATA_LOCK_OFFSET)
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/*
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* Ensure that the size of the FVP specific per-cpu data structure and the size
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* of the memory allocated in generic per-cpu data for the platform are the same.
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*/
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CASSERT(PLAT_PCPU_DATA_SIZE == sizeof(fvp_cpu_data_t), \
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fvp_pcpu_data_size_mismatch);
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#endif /* __USE_COHERENT_MEM__ */
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/*******************************************************************************
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* Function and variable prototypes
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******************************************************************************/
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void fvp_configure_mmu_el1(unsigned long total_base,
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unsigned long total_size,
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unsigned long,
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unsigned long
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#if USE_COHERENT_MEM
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, unsigned long,
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unsigned long
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#endif
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);
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void fvp_configure_mmu_el3(unsigned long total_base,
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unsigned long total_size,
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unsigned long,
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unsigned long
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#if USE_COHERENT_MEM
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, unsigned long,
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unsigned long
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#endif
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);
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int fvp_config_setup(void);
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void fvp_cci_init(void);
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void fvp_cci_enable(void);
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void fvp_gic_init(void);
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/* Declarations for fvp_topology.c */
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int fvp_setup_topology(void);
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/* Declarations for fvp_io_storage.c */
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void fvp_io_setup(void);
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/* Declarations for fvp_security.c */
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void fvp_security_setup(void);
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/* Gets the SPR for BL32 entry */
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uint32_t fvp_get_spsr_for_bl32_entry(void);
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/* Gets the SPSR for BL33 entry */
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uint32_t fvp_get_spsr_for_bl33_entry(void);
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#endif /* __FVP_PRIVATE_H__ */
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