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e7d4caa298
This patch implements support for T132 (Denver CPU) based Tegra platforms. The following features have been added: * SiP calls to switch T132 CPU's AARCH mode * Complete PSCI support, including 'System Suspend' * Platform specific MMIO settings * Locking of CPU vector registers Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
83 lines
3.8 KiB
C
83 lines
3.8 KiB
C
/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __TEGRA_DEF_H__
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#define __TEGRA_DEF_H__
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#include <platform_def.h>
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/*******************************************************************************
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* This value is used by the PSCI implementation during the `SYSTEM_SUSPEND`
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* call as the `state-id` field in the 'power state' parameter.
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******************************************************************************/
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#define PLAT_SYS_SUSPEND_STATE_ID 0xD
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/*******************************************************************************
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* GIC memory map
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******************************************************************************/
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#define TEGRA_GICD_BASE 0x50041000
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#define TEGRA_GICC_BASE 0x50042000
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/*******************************************************************************
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* Tegra micro-seconds timer constants
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******************************************************************************/
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#define TEGRA_TMRUS_BASE 0x60005010
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/*******************************************************************************
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* Tegra Clock and Reset Controller constants
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******************************************************************************/
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#define TEGRA_CAR_RESET_BASE 0x60006000
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/*******************************************************************************
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* Tegra Flow Controller constants
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******************************************************************************/
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#define TEGRA_FLOWCTRL_BASE 0x60007000
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/*******************************************************************************
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* Tegra Secure Boot Controller constants
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******************************************************************************/
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#define TEGRA_SB_BASE 0x6000C200
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/*******************************************************************************
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* Tegra Exception Vectors constants
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******************************************************************************/
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#define TEGRA_EVP_BASE 0x6000F000
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/*******************************************************************************
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* Tegra Power Mgmt Controller constants
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******************************************************************************/
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#define TEGRA_PMC_BASE 0x7000E400
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/*******************************************************************************
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* Tegra Memory Controller constants
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******************************************************************************/
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#define TEGRA_MC_BASE 0x70019000
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#endif /* __TEGRA_DEF_H__ */
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