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arm-trusted-firmware/plat/intel/soc
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Sieu Mun Tang a8d81d61e1 fix(intel): implement soc and lwsoc bridge control for burst speed 
Implement burst speed read/write for SOC and LWSOC. Set bridge control
register to enable the register bit

Change-Id: I815b912cb90d79a548163d198eea177d70dfbc0d
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
2024-10-17 23:14:55 +02:00
..
agilex Merge "fix(intel): update outdated code for Linux direct boot" into integration 2024-10-17 00:45:35 +02:00
agilex5 fix(intel): implement soc and lwsoc bridge control for burst speed 2024-10-17 23:14:55 +02:00
common fix(intel): implement soc and lwsoc bridge control for burst speed 2024-10-17 23:14:55 +02:00
n5x fix(intel): update Agilex5 BL2 init flow and other misc changes 2024-10-09 20:04:16 +02:00
stratix10 Merge "fix(intel): update outdated code for Linux direct boot" into integration 2024-10-17 00:45:35 +02:00