Kevin Chen aa09622233 fix(ast2700): fix mpll calculate statement ... pll_reg.b.bypass equal to 1U, bypass the mpll calculating pll_reg.b.bypass equal to 0U, need to calculate mpll Change-Id: I6cace1509d9429a97c7c9481dc1e2e4f95134d6c Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>		2024-08-01 14:55:15 +08:00
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include	feat(ast2700): set up CPU clock frequency by SCU	2024-07-02 16:05:36 +08:00
plat_bl31_setup.c	fix(ast2700): fix mpll calculate statement	2024-08-01 14:55:15 +08:00
plat_helpers.S	feat(ast2700): set up CPU clock frequency by SCU	2024-07-02 16:05:36 +08:00
plat_pm.c	feat(ast2700): add Aspeed AST2700 platform support	2023-06-12 10:28:21 +08:00
plat_topology.c	feat(ast2700): add Aspeed AST2700 platform support	2023-06-12 10:28:21 +08:00
platform.mk	refactor(ast2700): adopt RESET_TO_BL31 boot flow	2023-09-28 10:23:06 +08:00