Govindraj Raja f3e2b49970 fix(cpufeat): avoid using mrrs/msrr for tspd ... tspd compiles with `arch_helpers.h` and when FEAT_D128 is enabled read/writes to D128 impacted registers will provide 128-bit mrrs/msrr read/write implementation. However FEAT_D128 implementation with SCR_EL3.D128en is set only for lower-EL Non-Secure world. When tspd is chosen as the SPD target, it builds tsp as well. This S-EL1 payload, used for testing, inadvertently uses mrrs/msrr read/write implementation in `modify_el1_common_regs` helper function. This eventually leads to a panic. Group all D128 impacted registers and avoid using mrrs/msrr read/write implementation for tspd builds. Change-Id: Ic0ed3a901ffa65f9447cae08951defbadee3e02a Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>		2025-03-07 18:12:12 +01:00
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aarch32	perf(amu): greatly simplify AMU context management	2025-02-25 08:50:46 +00:00
aarch64	fix(cpufeat): avoid using mrrs/msrr for tspd	2025-03-07 18:12:12 +01:00