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https://github.com/ARM-software/arm-trusted-firmware.git
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51e223058f
This should replace the stm32mp157a-avenger96.dts with the new device tree files split into the STM32MP15 DHCOR SoM definition and the Avenger96 baseboard like it's done in Linux and U-Boot. Differences to stm32mp157a-avenger96.dts: - Enable sdmmc2 for booting from eMMC - improved clock settings like in U-Boot commit b6055945 "ARM: dts: stm32: Adjust PLL4 settings on AV96 again" - improved DDR settings for DHSOMs like in U-Boot commit 92ca0f74 "ARM: dts: stm32: Synchronize DDR setttings on DH SoMs" TF-A with this new dts(i) files on this board was fully tested with the latest OP-TEE developer setup. Change-Id: I85ce8eca7747965af3555fc19fd7b192dc3e5740 Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
100 lines
1.9 KiB
Text
100 lines
1.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
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* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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* Copyright (C) 2020 Marek Vasut <marex@denx.de>
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* Copyright (C) 2022 DH electronics GmbH
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*/
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/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
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#include "stm32mp15xx-dhcor-io1v8.dtsi"
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/ {
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aliases {
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serial0 = &uart4;
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serial1 = &uart7;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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sd_switch: regulator-sd_switch {
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compatible = "regulator-gpio";
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regulator-name = "sd_switch";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2900000>;
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regulator-type = "voltage";
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regulator-always-on;
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gpios = <&gpioi 5 0>;
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gpios-states = <0>;
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states = <1800000 0x1>,
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<2900000 0x0>;
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};
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};
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&sdmmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
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disable-wp;
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st,sig-dir;
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st,neg-edge;
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st,use-ckin;
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bus-width = <4>;
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vmmc-supply = <&vdd_sd>;
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vqmmc-supply = <&sd_switch>;
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status = "okay";
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};
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&sdmmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
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bus-width = <8>;
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mmc-ddr-1_8v;
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no-sd;
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no-sdio;
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non-removable;
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st,neg-edge;
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vmmc-supply = <&v3v3>;
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vqmmc-supply = <&vdd_io>;
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status = "okay";
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};
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&uart4 {
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/* On Low speed expansion header */
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label = "LS-UART1";
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins_b>;
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status = "okay";
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};
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&uart7 {
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/* On Low speed expansion header */
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label = "LS-UART0";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7_pins_a>;
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uart-has-rtscts;
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status = "okay";
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};
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&usbotg_hs {
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pinctrl-0 = <&usbotg_hs_pins_a>;
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pinctrl-names = "default";
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phy-names = "usb2-phy";
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phys = <&usbphyc_port1 0>;
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status = "okay";
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vbus-supply = <&vbus_otg>;
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};
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&usbphyc {
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status = "okay";
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};
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&usbphyc_port0 {
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phy-supply = <&vdd_usb>;
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};
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&usbphyc_port1 {
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phy-supply = <&vdd_usb>;
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};
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