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7623e085cb
* This patch adds support to tsp (BL32) Image, to exercise EL1_context registers at S-EL1. * Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX registers at S-EL1 and overwrite them. Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
50 lines
1.5 KiB
Makefile
50 lines
1.5 KiB
Makefile
#
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# Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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INCLUDES += -Iinclude/bl32/tsp
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ifeq (${SPMC_AT_EL3},1)
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BL32_SOURCES += bl32/tsp/tsp_ffa_main.c \
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bl32/tsp/ffa_helpers.c
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else
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BL32_SOURCES += bl32/tsp/tsp_main.c
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endif
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BL32_SOURCES += bl32/tsp/aarch64/tsp_entrypoint.S \
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bl32/tsp/aarch64/tsp_exceptions.S \
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bl32/tsp/aarch64/tsp_request.S \
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bl32/tsp/tsp_interrupt.c \
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bl32/tsp/tsp_timer.c \
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bl32/tsp/tsp_common.c \
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bl32/tsp/tsp_context.c \
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common/aarch64/early_exceptions.S \
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lib/locks/exclusive/aarch64/spinlock.S
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BL32_DEFAULT_LINKER_SCRIPT_SOURCE := bl32/tsp/tsp.ld.S
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ifeq ($($(ARCH)-ld-id),gnu-gcc)
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BL32_LDFLAGS += -Wl,--sort-section=alignment
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else ifneq ($(filter llvm-lld gnu-ld,$($(ARCH)-ld-id)),)
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BL32_LDFLAGS += --sort-section=alignment
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endif
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# This flag determines if the TSPD initializes BL32 in tspd_init() (synchronous
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# method) or configures BL31 to pass control to BL32 instead of BL33
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# (asynchronous method).
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TSP_INIT_ASYNC := 0
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$(eval $(call assert_boolean,TSP_INIT_ASYNC))
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$(eval $(call add_define,TSP_INIT_ASYNC))
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# Include the platform-specific TSP Makefile
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# If no platform-specific TSP Makefile exists, it means TSP is not supported
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# on this platform.
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TSP_PLAT_MAKEFILE := $(wildcard ${PLAT_DIR}/tsp/tsp-${PLAT}.mk)
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ifeq (,${TSP_PLAT_MAKEFILE})
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$(error TSP is not supported on platform ${PLAT})
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else
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include ${TSP_PLAT_MAKEFILE}
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endif
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