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arm-trusted-firmware/plat/intel/soc
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Sieu Mun Tang 9978a3fd8b fix(intel): update the size with addition 0x8000 0000 base 
The FPGA_CONFIG_SIZE is actually the end address of FPGA_CONFIG_ADDR
Thus, we need to add in the DDR base address which is 0x8000 0000.

Change-Id: I177596243e0616c6eadc2fa388e85e28692dc8f7
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
2024-10-16 23:39:09 +02:00
..
agilex feat(intel): enable VAB support for Intel products 2024-07-21 10:35:17 +08:00
agilex5 fix(intel): update the size with addition 0x8000 0000 base 2024-10-16 23:39:09 +02:00
common fix(intel): update CCU configuration for Agilex5 platform 2024-09-25 21:45:17 +02:00
n5x Merge "feat(intel): enable SDMMC frontdoor load for ATF->Linux" into integration 2024-01-19 11:08:14 +01:00
stratix10 Merge "feat(intel): enable SDMMC frontdoor load for ATF->Linux" into integration 2024-01-19 11:08:14 +01:00