Manish V Badarkhe e1b15b09a5 fix(gic600): implement workaround to forward highest priority interrupt ... If the interrupt being targeted is released from the CPU before the CLEAR command is sent to the CPU then a subsequent SET command may not be delivered in a finite time. To workaround this, issue an unblocking event by toggling GICR_CTLR.DPG* bits after clearing the cpu group enable (EnableGrp* bits of GIC CPU interface register) This fix is implemented as per the errata 2384374-part 2 workaround mentioned here: https://developer.arm.com/documentation/sden892601/latest/ Change-Id: I13926ceeb7740fa4c05cc5b43170e7ce49598f70 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>		2022-06-15 22:02:13 +01:00
..
common	TF-A GICv2 driver: Introduce makefile	2020-07-20 16:44:34 +00:00
v2	Fix casting bug in gicv2_main.c	2020-10-10 07:14:44 +00:00
v3	fix(gic600): implement workaround to forward highest priority interrupt	2022-06-15 22:02:13 +01:00