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https://github.com/ARM-software/arm-trusted-firmware.git
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8b81a39e28
S32G274ARDB2 is a development board to showcase the capabilities of the S32G2 SoC. It includes 4 ARM Cortex-A53 cores running at 1.0GHz, 4GBs of DDR, accelerators for automotive networking and many other peripherals. The added support is minimal and only includes the BL2 stage, with no MMU enabled. The FIP is preloaded by the BootROM in SRAM, and BL2 copies BL31 and BL33 from FIP to their designated addresses. Change-Id: Iedda23302768ab70d63787117c5f6f3c21eb9842 Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com> Signed-off-by: Dan Nica <dan.nica@nxp.com> Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com> Signed-off-by: Bogdan Roman <bogdan-gabriel.roman@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLATFORM_DEF_H
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#define PLATFORM_DEF_H
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#include <plat/common/common_def.h>
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#define PLATFORM_STACK_SIZE U(0x1000)
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/* Caches */
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#define CACHE_WRITEBACK_SHIFT U(6)
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#define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT)
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/* CPU Topology */
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#define PLATFORM_CORE_COUNT U(4)
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#define PLATFORM_SYSTEM_COUNT U(1)
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#define PLATFORM_PRIMARY_CPU U(0)
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#define PLATFORM_MPIDR_CPU_MASK_BITS U(1)
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/* Power Domains */
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#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
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#define PLAT_MAX_OFF_STATE U(2)
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#define PLAT_MAX_RET_STATE U(1)
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#define PLAT_MAX_PWR_LVL_STATES U(2)
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/* BL2 stage */
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#define BL2_BASE UL(0x34078000)
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#define BL2_LIMIT UL(0x34100000)
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/* BL31 stage */
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#define BL31_BASE UL(0x34200000)
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#define BL31_LIMIT UL(0x34300000)
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/* It is a dummy value for now, given the missing DDR */
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#define BL33_BASE UL(0x34500000)
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#define BL33_LIMIT UL(0x345FF000)
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/* Console settings */
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#define UART_BASE UL(0x401C8000)
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#define UART_BAUDRATE U(115200)
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/* FIRC clock */
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#define UART_CLOCK_HZ U(48000000)
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#define S32G_FIP_BASE UL(0x34100000)
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#define S32G_FIP_SIZE UL(0x100000)
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#define MAX_IO_HANDLES U(2)
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#define MAX_IO_DEVICES U(2)
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#endif /* PLATFORM_DEF_H */
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