Ghennadi Procopciuc 8b81a39e28 feat(s32g274a): add S32G274ARDB2 board support ... S32G274ARDB2 is a development board to showcase the capabilities of the S32G2 SoC. It includes 4 ARM Cortex-A53 cores running at 1.0GHz, 4GBs of DDR, accelerators for automotive networking and many other peripherals. The added support is minimal and only includes the BL2 stage, with no MMU enabled. The FIP is preloaded by the BootROM in SRAM, and BL2 copies BL31 and BL33 from FIP to their designated addresses. Change-Id: Iedda23302768ab70d63787117c5f6f3c21eb9842 Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com> Signed-off-by: Dan Nica <dan.nica@nxp.com> Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com> Signed-off-by: Bogdan Roman <bogdan-gabriel.roman@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>		2024-04-25 11:22:53 +03:00
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common	fix(tree): correct some typos	2023-05-09 15:57:12 +01:00
s32/s32g274ardb2	feat(s32g274a): add S32G274ARDB2 board support	2024-04-25 11:22:53 +03:00
soc-ls1028a	fix(layerscape): fix errata a008850	2022-11-22 14:56:19 +08:00
soc-ls1043a	fix(layerscape): unlock write access SMMU_CBn_ACTLR	2022-12-06 22:46:10 +08:00
soc-ls1046a	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
soc-ls1088a	fix(tree): correct some typos	2023-05-09 15:57:12 +01:00
soc-lx2160a	fix(layerscape): unlock write access SMMU_CBn_ACTLR	2022-12-06 22:46:10 +08:00