arm-trusted-firmware/lib/extensions
Jayanth Dodderi Chidanand 777f1f6897 fix(spe): invoke spe_disable during power domain off/suspend
spe_disable function, disables profiling and flushes all the buffers and
hence needs to be called on power-off/suspend path.
It needs to be invoked as SPE feature writes to memory as part of
regular operation and not disabling before exiting coherency
could potentially cause issues.

Currently, this is handled only for the FVP. Other platforms need
to replicate this behaviour and is covered as part of this patch.

Calling it from generic psci library code, before the platform specific
actions to turn off the CPUs, will make it applicable for all the
platforms which have ported the PSCI library.

Change-Id: I90b24c59480357e2ebfa3dfc356c719ca935c13d
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
2024-02-02 20:06:28 +00:00
..
amu refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
brbe refactor(cpufeat): separate the EL2 and EL3 enablement code 2023-07-04 14:57:46 +01:00
mpam refactor(cm): move MPAM3_EL3 reg to per world context 2023-12-21 12:37:21 +00:00
pauth chore(pauth): remove redundant pauth_disable_el3() call 2023-04-28 08:09:14 +01:00
pmuv3 refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only 2023-07-24 11:04:44 +01:00
ras chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
sme refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
spe fix(spe): invoke spe_disable during power domain off/suspend 2024-02-02 20:06:28 +00:00
sve refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
sys_reg_trace refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
trbe refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only 2023-07-24 11:04:44 +01:00
trf fix(cm): set MDCR_EL3.{NSPBE, STE} explicitly 2023-07-24 11:04:38 +01:00