mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-17 10:04:26 +00:00

When ICH_VMCR_EL2.VBPR1 is written in Secure state (SCR_EL3.NS==0) and then subsequently read in Non-secure state (SCR_EL3.NS==1), a wrong value might be returned. The same issue exists in the opposite way. Adding workaround in EL3 software that performs context save/restore on a change of Security state to use a value of SCR_EL3.NS when accessing ICH_VMCR_EL2 that reflects the Security state that owns the data being saved or restored. For example, EL3 software should set SCR_EL3.NS to 1 when saving or restoring the value ICH_VMCR_EL2 for Non-secure(or Realm) state. EL3 software should clear SCR_EL3.NS to 0 when saving or restoring the value ICH_VMCR_EL2 for Secure state. SDEN documentation: https://developer.arm.com/documentation/SDEN-1775101/latest/ Change-Id: I9f0403601c6346276e925f02eab55908b009d957 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/*
|
|
* Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
/* Runtime C routines for errata workarounds and common routines */
|
|
|
|
#include <arch.h>
|
|
#include <arch_helpers.h>
|
|
#include <cortex_a75.h>
|
|
#include <cortex_a520.h>
|
|
#include <cortex_x4.h>
|
|
#include <lib/cpus/cpu_ops.h>
|
|
#include <lib/cpus/errata.h>
|
|
|
|
#if ERRATA_A520_2938996 || ERRATA_X4_2726228
|
|
unsigned int check_if_affected_core(void)
|
|
{
|
|
uint32_t midr_val = read_midr();
|
|
long rev_var = cpu_get_rev_var();
|
|
|
|
if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) {
|
|
return check_erratum_cortex_a520_2938996(rev_var);
|
|
} else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) {
|
|
return check_erratum_cortex_x4_2726228(rev_var);
|
|
}
|
|
|
|
return ERRATA_NOT_APPLIES;
|
|
}
|
|
#endif
|
|
|
|
#if ERRATA_A75_764081
|
|
bool errata_a75_764081_applies(void)
|
|
{
|
|
long rev_var = cpu_get_rev_var();
|
|
if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) {
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
#endif /* ERRATA_A75_764081 */
|
|
|
|
bool errata_ich_vmcr_el2_applies(void)
|
|
{
|
|
switch (EXTRACT_PARTNUM(read_midr())) {
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return false;
|
|
}
|