Konstantin Porotchkin 718dbcac9c plat/marvell/armada: allow builds without MSS support ... Setting MSS_SUPPORT to 0 also removes requirement for SCP_BL2 definition. Images build with MSS_SUPPORT=0 will not include service CPUs FW and will not support PM, FC and other features implemented in these FW images. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Change-Id: Idf301ebd218ce65a60f277f3876d0aeb6c72f105 Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/37769 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com>		2021-04-20 12:59:49 +02:00
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comphy	plat/marvell/armada: allow builds without MSS support	2021-04-20 12:59:49 +02:00
mc_trustzone	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mg_conf_cm3	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mochi	drivers/marvell/mochi: add support for cn913x in PCIe EP mode	2021-02-11 09:43:18 +00:00
secure_dfx_access	drivers: marvell: misc-dfx: extend dfx whitelist	2021-04-20 12:59:45 +02:00
uart	marvell: uart: a3720: Increase TX FIFO EMPTY timeout from 2ms to 3ms	2021-02-16 11:56:24 +01:00
amb_adec.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
ap807_clocks_init.c	ble: ap807: improve PLL configuration sequence	2020-06-07 00:06:03 +02:00
cache_llc.c	drivers: marvell: Fix the LLC SRAM driver	2020-07-10 10:55:33 +00:00
ccu.c	plat: marvell: armada: add ccu window for workaround errata-id 3033912	2020-10-04 15:23:29 +02:00
comphy.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
ddr_phy_access.c	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
ddr_phy_access.h	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
gwin.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
io_win.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
iob.c	marvell: drivers: move XOR0/1 DIOB from WIN 0 to 1	2021-02-11 09:43:18 +00:00
mci.c	plat: marvell: mci: perform mci link tuning for all mci interfaces	2020-06-07 00:06:03 +02:00
thermal.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00