Rohit Mathew 61a29682c6 fix(cpu): correct variant name for default Poseidon CPU ... Update the Poseidon CPU variant name to "POSEIDON VNAE" in alignment with the MIDR 0x410FD830. This adjustment reflects the accurate designation for the default Poseidon CPU and allows for seamless support of other variants in the future. CC: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I48183290ffc2889d6ae000d3aa423c0ee5e4d211		2024-01-04 19:06:38 +00:00
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aarch32	refactor(cpus): add Cortex-A57 errata framework information	2023-08-24 14:27:42 -05:00
aarch64	fix(cpu): correct variant name for default Poseidon CPU	2024-01-04 19:06:38 +00:00
cpu-ops.mk	Merge "fix(cpus): workaround for Cortex X3 erratum 2743088" into integration	2023-12-21 18:07:00 +01:00
errata_report.c	fix(cpus): reduce generic_errata_report()'s size	2023-06-15 10:14:59 +01:00