arm-trusted-firmware/lib/extensions
Andre Przywara 603a0c6fae refactor(cpufeat): enable SYS_REG_TRACE for FEAT_STATE_CHECKED
At the moment we only support access to the trace unit by system
registers (SYS_REG_TRACE) to be either unconditionally compiled in, or
to be not supported at all.

Add support for runtime detection (ENABLE_SYS_REG_TRACE_FOR_NS=2), by
adding is_feat_sys_reg_trace_supported(). That function considers both
build time settings and runtime information (if needed), and is used
before we access SYS_REG_TRACE related registers.

The FVP platform decided to compile in support unconditionally (=1),
even though this is an optional feature, so it is not available with the
FVP model's default command line.
Change that to the now supported dynamic option (=2), so the right
decision can be made by the code at runtime.

Change-Id: I450a574a4f6bd9fc269887037049c94c906f54b2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-03-22 13:33:22 +00:00
..
amu fix(amu): limit virtual offset register access to NS world 2022-04-28 20:30:42 +02:00
brbe refactor(brbe): enable FEAT_BRBE for FEAT_STATE_CHECKED 2023-02-27 18:04:14 +00:00
mpam refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED 2023-03-20 13:37:36 +00:00
mtpmu Add support for FEAT_MTPMU for Armv8.6 2020-12-11 12:49:20 +00:00
pauth TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U 2019-10-03 14:43:55 +01:00
ras lib/extensions/ras: fix bug of binary search 2021-01-14 09:27:16 +08:00
sme fix(sme): add missing ISBs 2022-10-13 13:51:05 +01:00
spe refactor(spe): enable FEAT_SPE for FEAT_STATE_CHECKED 2023-03-20 13:37:36 +00:00
sve feat(sve): support full SVE vector length 2022-07-08 17:17:11 +01:00
sys_reg_trace refactor(cpufeat): enable SYS_REG_TRACE for FEAT_STATE_CHECKED 2023-03-22 13:33:22 +00:00
trbe refactor(trbe): enable FEAT_TRBE for FEAT_STATE_CHECKED 2023-02-27 18:04:14 +00:00
trf refactor(trf): enable FEAT_TRF for FEAT_STATE_CHECKED 2023-02-27 18:04:14 +00:00