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arm-trusted-firmware/lib/cpus
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Govindraj Raja 5f32fd2145 fix(cpus): workaround for Neoverse-V3 erratum 2970647 
Neoverse V3 erratum 2970647 that applies to r0p0 and is fixed in r0p1.

In EL3, reads of MPIDR_EL1 and MIDR_EL1 might incorrectly virtualize
which register to return when reading the value of
MPIDR_EL1/VMPIDR_EL2 and MIDR_EL1/VPIDR_EL2, respectively.

The workaround is to do an ISB prior to an MRS read to either
MPIDR_EL1 and MIDR_EL1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2891958/latest/

Change-Id: Iedf7d799451f0be58a5da1f93f7f5b6940f2bb35
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2025-02-12 09:25:06 -06:00
..
aarch32 refactor(cpus): remove cpu specific errata funcs 2024-07-26 11:19:52 +01:00
aarch64 fix(cpus): workaround for Neoverse-V3 erratum 2970647 2025-02-12 09:25:06 -06:00
cpu-ops.mk fix(cpus): workaround for Neoverse-V3 erratum 2970647 2025-02-12 09:25:06 -06:00
errata_common.c fix(cpus): workaround for Neoverse-V3 erratum 3701767 2025-02-03 13:57:51 -06:00
errata_report.c refactor(cpus): directly invoke errata reporter 2024-07-26 11:19:52 +01:00