Yann Gautier 5e0be8c024 feat(stm32mp2): enable DDR sub-system clock ... Create a DDR helper files, and add a function to enable DDR clocks in RCC_DDRCPCFGR register. Call this ddr_sub_system_clk_init() just before clock driver init, as it needs to be done before enabling DDR PLL clock (PLL2). Change-Id: I365d6aa034363d0c036ce2d9f944f077ba86e193 Signed-off-by: Yann Gautier <yann.gautier@st.com>		2024-08-12 15:54:52 +02:00
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bsec	feat(st-bsec): use early traces	2024-04-24 15:44:28 +02:00
clk	feat(st-clock): add STM32MP2 clock driver	2024-06-27 18:27:17 +02:00
crypto	fix(st-crypto): use GENMASK_32 to define PKA registers masks	2023-09-27 18:41:46 +02:00
ddr	feat(stm32mp2): enable DDR sub-system clock	2024-08-12 15:54:52 +02:00
etzpc	refactor(st-drivers): do not rely on DT in etzpc_init	2022-08-10 10:00:03 +02:00
fmc	fix(st-fmc): fix type in message	2022-02-15 18:09:51 +01:00
gpio	fix(st-gpio): configure each GPIO mux as secure for STM32MP2	2024-06-17 11:24:09 +02:00
i2c	refactor(st-i2c): use fdt_read_uint32_default()	2024-01-19 10:06:06 +01:00
iwdg	feat(st): use newly introduced clock framework	2021-12-22 13:08:09 +01:00
mmc	feat(st-sdmmc2): set FIFO size to 1024 on STM32MP25	2024-03-06 11:54:00 +01:00
pmic	fix(st-pmic): define pmic_regs table size	2022-12-07 14:18:30 +01:00
regulator	refactor(st): rename PLAT_NB_FIXED_REGS	2023-09-08 10:56:49 +02:00
reset	feat(st-reset): add stm32mp2_reset driver	2024-06-27 18:27:17 +02:00
spi	fix(st-spi): remove SR_BUSY bit check before sending command	2022-05-11 10:01:33 +02:00
uart	feat(st-uart): add AARCH64 stm32_console driver	2023-09-08 10:56:49 +02:00
usb	fix(st-usb): replace redundant checks with asserts	2022-12-01 16:17:34 +00:00