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feat(stm32mp2): enable DDR sub-system clock
Create a DDR helper files, and add a function to enable DDR clocks in RCC_DDRCPCFGR register. Call this ddr_sub_system_clk_init() just before clock driver init, as it needs to be done before enabling DDR PLL clock (PLL2). Change-Id: I365d6aa034363d0c036ce2d9f944f077ba86e193 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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4 changed files with 36 additions and 0 deletions
15
drivers/st/ddr/stm32mp2_ddr_helpers.c
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15
drivers/st/ddr/stm32mp2_ddr_helpers.c
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@ -0,0 +1,15 @@
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/*
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* Copyright (c) 2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <lib/mmio.h>
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#include <platform_def.h>
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void ddr_sub_system_clk_init(void)
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{
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mmio_write_32(stm32mp_rcc_base() + RCC_DDRCPCFGR,
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RCC_DDRCPCFGR_DDRCPEN | RCC_DDRCPCFGR_DDRCPLPEN);
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}
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12
include/drivers/st/stm32mp2_ddr_helpers.h
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include/drivers/st/stm32mp2_ddr_helpers.h
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/*
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* Copyright (c) 2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP2_DDR_HELPERS_H
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#define STM32MP2_DDR_HELPERS_H
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void ddr_sub_system_clk_init(void);
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#endif /* STM32MP2_DDR_HELPERS_H */
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@ -10,6 +10,7 @@
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#include <common/debug.h>
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#include <drivers/clk.h>
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#include <drivers/st/regulator_fixed.h>
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#include <drivers/st/stm32mp2_ddr_helpers.h>
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#include <lib/fconf/fconf.h>
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#include <lib/fconf/fconf_dyn_cfg_getter.h>
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#include <lib/mmio.h>
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@ -186,6 +187,12 @@ void bl2_el3_plat_arch_setup(void)
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reset_backup_domain();
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/*
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* Initialize DDR sub-system clock. This needs to be done before enabling DDR PLL (PLL2),
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* and so before stm32mp2_clk_init().
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*/
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ddr_sub_system_clk_init();
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if (stm32mp2_clk_init() < 0) {
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panic();
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}
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@ -90,5 +90,7 @@ ifeq (${STM32MP_USB_PROGRAMMER},1)
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BL2_SOURCES += plat/st/stm32mp2/stm32mp2_usb_dfu.c
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endif
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BL2_SOURCES += drivers/st/ddr/stm32mp2_ddr_helpers.c
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# Compilation rules
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include plat/st/common/common_rules.mk
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