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![]() This patch adds capability to read the boot flag to enable L2 ECC and Parity Protection bit for the Cortex-A57 CPUs. The previous bootloader sets this flag value for the platform. * with some coverity fix: MISRA C-2012 Directive 4.6 MISRA C-2012 Rule 2.5 MISRA C-2012 Rule 10.3 MISRA C-2012 Rule 10.4 Change-Id: Id7303bbbdc290b52919356c31625847b8904b073 Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
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.. | ||
allwinner.rst | ||
hikey.rst | ||
hikey960.rst | ||
imx8.rst | ||
imx8m.rst | ||
ls1043a.rst | ||
meson-gxbb.rst | ||
nvidia-tegra.rst | ||
poplar.rst | ||
qemu.rst | ||
rcar-gen3.rst | ||
rpi3.rst | ||
socionext-uniphier.rst | ||
stm32mp1.rst | ||
synquacer.rst | ||
ti-k3.rst | ||
warp7.rst | ||
xilinx-versal.md | ||
xilinx-zynqmp.rst |