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![]() This patch adds capability to read the boot flag to enable L2 ECC and Parity Protection bit for the Cortex-A57 CPUs. The previous bootloader sets this flag value for the platform. * with some coverity fix: MISRA C-2012 Directive 4.6 MISRA C-2012 Rule 2.5 MISRA C-2012 Rule 10.3 MISRA C-2012 Rule 10.4 Change-Id: Id7303bbbdc290b52919356c31625847b8904b073 Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
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.. | ||
diagrams | ||
draw.io | ||
marvell | ||
plantuml | ||
plat | ||
spd | ||
arm-sip-service.rst | ||
auth-framework.rst | ||
change-log.rst | ||
cpu-specific-build-macros.rst | ||
exception-handling.rst | ||
firmware-design.rst | ||
firmware-update.rst | ||
interrupt-framework-design.rst | ||
platform-compatibility-policy.rst | ||
platform-interrupt-controller-API.rst | ||
porting-guide.rst | ||
psci-lib-integration-guide.rst | ||
psci-pd-tree.rst | ||
ras.rst | ||
reset-design.rst | ||
rt-svc-writers-guide.rst | ||
sdei.rst | ||
secure-partition-manager-design.rst | ||
trusted-board-boot.rst | ||
user-guide.rst | ||
xlat-tables-lib-v2-design.rst |