Ghennadi Procopciuc c23dde6c19 feat(nxp-clk): restore pll output dividers rate ... Reconfiguration of the PLL may be requested while some output dividers are already enabled. To prevent setting a different frequency for these enabled dividers, the driver will attempt to adjust the division factor to achieve the initially requested rate. Change-Id: I7800c05b2f21bbdeda243db865942b647983687d Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>		2025-01-23 13:13:24 +02:00
..
s32cc	feat(nxp-clk): restore pll output dividers rate	2025-01-23 13:13:24 +02:00