Nishant Sharma 4d9b8281f3 feat(rdv3): add dts files to enable hafnium as BL32 ... On RD-V3 platform and variants, Hafnium is used as SPMC running at S-EL2 and manage SP running at S-EL0. Hafnium is loaded and configured as BL32 image. SP is loaded by SP load framework and configured by Hafnium. Add the dts files needed to enable load and configuration of hafnium and SP. Signed-off-by: Nishant Sharma <nishant.sharma@arm.com> Signed-off-by: Rohit Mathew <rohit.mathew@arm.com> Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com> Change-Id: I7de72052323ff9106d7bedbaaf5ece3272e9a6cd		2025-02-05 10:58:38 +00:00
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a5ds	build: remove Windows compatibility layer	2025-01-14 16:21:51 +00:00
arm_fpga	perf(build): be clever about uppercasing	2024-11-08 12:27:46 +00:00
automotive_rd/platform/rd1ae	feat(rd1ae): add support for OP-TEE SPMC	2024-11-14 13:56:39 +00:00
common	refactor(arm): rename ARM_ROTPK_HEADER_LEN	2024-12-30 12:32:34 +01:00
corstone700	build(bl32): added check for AARCH32_SP	2023-08-24 14:22:34 -05:00
corstone1000	fix(corstone-1000): fix Makefile error reporting	2024-08-27 10:39:41 +01:00
fvp	Merge "chore(fvp): use correct dts for dynamiq cores" into integration	2025-01-20 19:31:31 +01:00
fvp_r	fix(arm): add extra hash config to validate ROTPK	2024-09-09 11:22:28 +01:00
fvp_ve	feat(fvp): add flash areas for secure partition	2024-07-29 09:55:43 +01:00
juno	refactor(arm): rename ARM_ROTPK_HEADER_LEN	2024-12-30 12:32:34 +01:00
morello	fix(morello): remove stray white-space in 'morello/platform.mk'	2025-01-02 23:34:29 +01:00
n1sdp	refactor(arm): remove unused SP_MIN UART macros	2024-04-02 13:36:31 +01:00
neoverse_rd	feat(rdv3): add dts files to enable hafnium as BL32	2025-02-05 10:58:38 +00:00
tc	Merge "fix(tc): enable Last-level cache (LLC) for tc4" into integration	2025-02-04 11:58:30 +01:00